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These rely on TF rather than short windows to avoid partial collapse.

The transient detector would trigger on low-pitch vowels, but we didn't have
enough bits to properly code the high bands as a transient, resulting in
partial collapse and unstable energy.

No point in minimizing the rate too since it's almost constant.

Fixes a potential overflow in high-passed signal for transient detection
and ensures that the shift can never go negative

When the energy is stable, we slightly bias energy quantization towards
the previous error to make the gain more stable (a constant offset is
better than fluctuations).

We reduce the bitrate by about 0.2% to 1% at low bitrate for the same quality.

Increasing the value at low rate seems to help a bit.

Otherwise, we risk having "temporal holes" in the HF that anti-collapse
can't always fill in.

It would trigger on the second frame of "S"s, causing holes in the spectrum

This saves bits and makes more sense since alloc_trim_analysis()
mostly looks at the lower bands that are coded with SILK

Turns out that even low bitrates benefit from VBR

Reported by Durandal.

...and also make it not ignore the right channel

Previously silence would cause the divide approximation on 0/0 to return a
very large value, which would be interpreted as a transient

Optimize opus decode (float only) use case using ARM NE10.
Mainly effects opus_ifft and ctl_mdct_backward and related
functions.

Work based on previous Encode optimization using ARM NE10
library. See previous commit for details on how to enable
this.
Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

Optimize opus encode (float only) usecase using ARM NE10
library. Mainly effects opus_fft and ctl_mdct_forward
and related functions.

This optimization can be used for ARM CPUs that have NEON
VFP unit. This patch only enables optimizations for ARMv7.

Official ARM NE10 library page available at
http://projectne10.github.io/Ne10/

To enable this optimization, use
--enable-intrinsics --with-NE10=<install_prefix>
or
--enable-intrinsics --with-NE10-libraries=<NE10_lib_dir> --with-NE10-includes=<NE10_includes_dir>

Compile time checks made during configure process to make sure
optimization option available only when compiler supports NEON
instrinsics.

Runtime checks made to make sure optimized functions only called
on appropriate hardware.
Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

Enable x86 intrinsics when building in floating-point mode.
Support SSE as an arch value.
Use RTCD to conditionally enable existing floating-point Celt SSE code.
Call functions directly (without RTCD) when their architecture can be presumed.
Use SSE4.1 intrinsics optimized code for Silk even in floating-point mode.

This should suppress our current issues with unused parameters,
 unused variables, and set-but-not-used variables.

1. Only for fixed point on x86 platform (32bit and 64bit, uses SIMD
   intrinsics up to SSE4.2)
2. Use "configure --enable-fixed-point --enable-intrinsics" to enable
   optimization, default is disabled.
3. Official test cases are verified and passed.
Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

This should prevent extreme dynalloc behaviour in cases where some
bands are heavily attenuated.

Also moves the VSHR32() condition outside the loop just in case some compilers
don't optimize that properly.

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>

Also adds an SSE-optimized celt_inner_prod().

This is a bit faster at -O2 because memcpy()/memmove()/memset() are
vectorized. The code is also cleaner.