Commit 2c317905 authored by Luc Trudeau's avatar Luc Trudeau Committed by Luc Trudeau

[CFL] Support for skip_chroma_rd in CB4X4

CFL is disabled when skip_chroma_rd is enabled. This is done by reusing
the logic in CB4X4. To facilitate integration, the skip logic used in CfL is
moved inside the read/write functions.

Results on Subset1:
master@2017-05-08T19:54:48.196Z -> cfl_baseline@2017-05-08T20:06:55.292Z
  PSNR |  PSNR Cb |  PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
0.2668 | -12.0951 | -10.4138 |   0.3095 | 0.2998 |  0.2831 |    -3.6579
https://arewecompressedyet.com/?job=master%402017-05-08T19%3A54%3A48.196Z&job=cfl_baseline%402017-05-08T20%3A06%3A55.292Z

Change-Id: I45644baa1aceef5ad4da3332fcb10f3fbaac052b
parent d7b8320e
......@@ -208,33 +208,27 @@ static PREDICTION_MODE read_intra_mode_uv(AV1_COMMON *cm, MACROBLOCKD *xd,
}
#if CONFIG_CFL
static int read_cfl_alphas(
#if CONFIG_EC_ADAPT
MACROBLOCKD *xd,
#elif CONFIG_EC_MULTISYMBOL
AV1_COMMON *cm,
#endif
aom_reader *r, CFL_SIGN_TYPE signs[CFL_PRED_PLANES]) {
#if CONFIG_EC_ADAPT
FRAME_CONTEXT *ec_ctx = xd->tile_ctx;
#elif CONFIG_EC_MULTISYMBOL
FRAME_CONTEXT *ec_ctx = cm->fc;
#endif
const int ind =
aom_read_symbol(r, ec_ctx->cfl_alpha_cdf, CFL_ALPHABET_SIZE, "cfl:alpha");
// Signs are only coded for nonzero values
// sign == 0 implies negative alpha
// sign == 1 implies positive alpha
signs[CFL_PRED_U] = (cfl_alpha_codes[ind][CFL_PRED_U] != 0.0)
? aom_read_bit(r, "cfl:sign")
: CFL_SIGN_POS;
signs[CFL_PRED_V] = (cfl_alpha_codes[ind][CFL_PRED_V] != 0.0)
? aom_read_bit(r, "cfl:sign")
: CFL_SIGN_POS;
return ind;
static int read_cfl_alphas(FRAME_CONTEXT *const ec_ctx, aom_reader *r, int skip,
CFL_SIGN_TYPE signs_out[CFL_PRED_PLANES]) {
if (skip) {
signs_out[CFL_PRED_U] = CFL_SIGN_POS;
signs_out[CFL_PRED_V] = CFL_SIGN_POS;
return 0;
} else {
const int ind = aom_read_symbol(r, ec_ctx->cfl_alpha_cdf, CFL_ALPHABET_SIZE,
"cfl:alpha");
// Signs are only coded for nonzero values
// sign == 0 implies negative alpha
// sign == 1 implies positive alpha
signs_out[CFL_PRED_U] = (cfl_alpha_codes[ind][CFL_PRED_U] != 0.0)
? aom_read_bit(r, "cfl:sign")
: CFL_SIGN_POS;
signs_out[CFL_PRED_V] = (cfl_alpha_codes[ind][CFL_PRED_V] != 0.0)
? aom_read_bit(r, "cfl:sign")
: CFL_SIGN_POS;
return ind;
}
}
#endif
......@@ -1121,28 +1115,26 @@ static void read_intra_frame_mode_info(AV1_COMMON *const cm,
#if CONFIG_CB4X4
if (is_chroma_reference(mi_row, mi_col, bsize, xd->plane[1].subsampling_x,
xd->plane[1].subsampling_y))
xd->plane[1].subsampling_y)) {
mbmi->uv_mode = read_intra_mode_uv(cm, xd, r, mbmi->mode);
#else
mbmi->uv_mode = read_intra_mode_uv(cm, xd, r, mbmi->mode);
#endif
#if CONFIG_CFL
// TODO(ltrudeau) support PALETTE
if (mbmi->uv_mode == DC_PRED) {
if (mbmi->skip) {
mbmi->cfl_alpha_ind = 0;
mbmi->cfl_alpha_signs[CFL_PRED_U] = CFL_SIGN_POS;
mbmi->cfl_alpha_signs[CFL_PRED_V] = CFL_SIGN_POS;
} else {
// TODO(ltrudeau) support PALETTE
if (mbmi->uv_mode == DC_PRED) {
mbmi->cfl_alpha_ind = read_cfl_alphas(
#if CONFIG_EC_ADAPT
xd,
xd->tile_ctx,
#elif CONFIG_EC_MULTISYMBOL
cm,
#endif
r, mbmi->cfl_alpha_signs);
cm->fc,
#endif // CONFIG_EC_ADAPT
r, mbmi->skip, mbmi->cfl_alpha_signs);
}
#endif // CONFIG_CFL
#if CONFIG_CB4X4
}
#endif
......
......@@ -1691,17 +1691,23 @@ static void write_intra_uv_mode(FRAME_CONTEXT *frame_ctx,
}
#if CONFIG_CFL
static void write_cfl_alphas(FRAME_CONTEXT *const frame_ctx, const int ind,
static void write_cfl_alphas(FRAME_CONTEXT *const frame_ctx, int skip, int ind,
const CFL_SIGN_TYPE signs[CFL_SIGNS],
aom_writer *w) {
// Write a symbol representing a combination of alpha Cb and alpha Cr.
aom_write_symbol(w, ind, frame_ctx->cfl_alpha_cdf, CFL_ALPHABET_SIZE);
// Signs are only signaled for nonzero codes.
if (cfl_alpha_codes[ind][CFL_PRED_U] != 0)
aom_write_bit(w, signs[CFL_PRED_U]);
if (cfl_alpha_codes[ind][CFL_PRED_V] != 0)
aom_write_bit(w, signs[CFL_PRED_V]);
if (skip) {
assert(ind == 0);
assert(signs[CFL_PRED_U] == CFL_SIGN_POS);
assert(signs[CFL_PRED_V] == CFL_SIGN_POS);
} else {
// Write a symbol representing a combination of alpha Cb and alpha Cr.
aom_write_symbol(w, ind, frame_ctx->cfl_alpha_cdf, CFL_ALPHABET_SIZE);
// Signs are only signaled for nonzero codes.
if (cfl_alpha_codes[ind][CFL_PRED_U] != 0)
aom_write_bit(w, signs[CFL_PRED_U]);
if (cfl_alpha_codes[ind][CFL_PRED_V] != 0)
aom_write_bit(w, signs[CFL_PRED_V]);
}
}
#endif
......@@ -2181,24 +2187,22 @@ static void write_mb_modes_kf(AV1_COMMON *cm, const MACROBLOCKD *xd,
#if CONFIG_CB4X4
if (is_chroma_reference(mi_row, mi_col, bsize, xd->plane[1].subsampling_x,
xd->plane[1].subsampling_y))
xd->plane[1].subsampling_y)) {
write_intra_uv_mode(ec_ctx, mbmi->uv_mode, mbmi->mode, w);
#else // !CONFIG_CB4X4
write_intra_uv_mode(ec_ctx, mbmi->uv_mode, mbmi->mode, w);
#endif // CONFIG_CB4X4
#if CONFIG_CFL
if (mbmi->uv_mode == DC_PRED) {
if (mbmi->skip) {
assert(mbmi->cfl_alpha_ind == 0);
assert(mbmi->cfl_alpha_signs[CFL_PRED_U] == CFL_SIGN_POS);
assert(mbmi->cfl_alpha_signs[CFL_PRED_V] == CFL_SIGN_POS);
} else {
write_cfl_alphas(ec_ctx, mbmi->cfl_alpha_ind, mbmi->cfl_alpha_signs, w);
if (mbmi->uv_mode == DC_PRED) {
write_cfl_alphas(ec_ctx, mbmi->skip, mbmi->cfl_alpha_ind,
mbmi->cfl_alpha_signs, w);
}
}
#endif
#if CONFIG_CB4X4
}
#endif
#if CONFIG_EXT_INTRA
write_intra_angle_info(xd, ec_ctx, w);
#endif // CONFIG_EXT_INTRA
......
......@@ -1636,11 +1636,6 @@ void av1_predict_intra_block_encoder_facade(MACROBLOCK *x, int plane,
BLOCK_SIZE plane_bsize) {
MACROBLOCKD *const xd = &x->e_mbd;
MB_MODE_INFO *mbmi = &xd->mi[0]->mbmi;
if (blk_col == 0 && blk_row == 0 && plane == AOM_PLANE_Y) {
mbmi->cfl_alpha_ind = 0;
mbmi->cfl_alpha_signs[CFL_PRED_U] = CFL_SIGN_POS;
mbmi->cfl_alpha_signs[CFL_PRED_V] = CFL_SIGN_POS;
}
if (plane != AOM_PLANE_Y && mbmi->uv_mode == DC_PRED) {
if (blk_col == 0 && blk_row == 0 && plane == AOM_PLANE_U) {
#if !CONFIG_EC_ADAPT
......
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