Skip to content
GitLab
Projects
Groups
Snippets
Help
Loading...
Help
What's new
7
Help
Support
Community forum
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
Open sidebar
Xiph.Org
aom-rav1e
Commits
3d908191
Commit
3d908191
authored
Oct 20, 2015
by
Ronald S. Bultje
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
vp10: don't make right edge available across tile boundaries.
Change-Id: Ia81cf3858ef6c8d1fd4b1fb2dd9627906081129d
parent
293e20df
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
3 additions
and
1 deletion
+3
-1
vp10/common/reconintra.c
vp10/common/reconintra.c
+3
-1
No files found.
vp10/common/reconintra.c
View file @
3d908191
...
...
@@ -708,8 +708,10 @@ void vp10_predict_intra_block(const MACROBLOCKD *xd, int bwl_in, int bhl_in,
const
int
mi_col
=
-
xd
->
mb_to_left_edge
>>
6
;
const
BLOCK_SIZE
bsize
=
xd
->
mi
[
0
]
->
mbmi
.
sb_type
;
const
struct
macroblockd_plane
*
const
pd
=
&
xd
->
plane
[
plane
];
const
int
right_available
=
mi_col
+
(
bw
>>
!
pd
->
subsampling_x
)
<
xd
->
tile
.
mi_col_end
;
const
int
have_right
=
vp10_has_right
(
bsize
,
mi_row
,
mi_col
,
xd
->
mb_to_right_edge
>
0
,
right_available
,
tx_size
,
loff
,
aoff
,
pd
->
subsampling_x
);
const
int
have_bottom
=
vp10_has_bottom
(
bsize
,
mi_row
,
mi_col
,
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
.
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment