From 4017fca31fb736925181da6bde8b4efe84ca5c7b Mon Sep 17 00:00:00 2001
From: Thomas <thdavies@cisco.com>
Date: Sat, 13 Feb 2016 11:41:42 +0000
Subject: [PATCH] Modify tests to allow quantization matrices.
Change-Id: If740ec7e549d8bcd387f92c43fd8105c528e86ed
---
test/cpu_speed_test.cc | 11 +++++++++++
test/end_to_end_test.cc | 4 ++++
test/quantize_test.cc | 2 ++
3 files changed, 17 insertions(+)
diff --git a/test/cpu_speed_test.cc b/test/cpu_speed_test.cc
index 0620f56c8a..c206285944 100644
--- a/test/cpu_speed_test.cc
+++ b/test/cpu_speed_test.cc
@@ -17,6 +17,9 @@
namespace {
const int kMaxPSNR = 100;
+#if CONFIG_AOM_QM
+const int kMaxPSNR_QM = 35;
+#endif
class CpuSpeedTest
: public ::libvpx_test::EncoderTest,
@@ -80,7 +83,11 @@ TEST_P(CpuSpeedTest, TestQ0) {
init_flags_ = VPX_CODEC_USE_PSNR;
ASSERT_NO_FATAL_FAILURE(RunLoop(&video));
+#if CONFIG_AOM_QM
+ EXPECT_GE(min_psnr_, kMaxPSNR_QM);
+#else
EXPECT_GE(min_psnr_, kMaxPSNR);
+#endif
}
TEST_P(CpuSpeedTest, TestScreencastQ0) {
@@ -95,7 +102,11 @@ TEST_P(CpuSpeedTest, TestScreencastQ0) {
init_flags_ = VPX_CODEC_USE_PSNR;
ASSERT_NO_FATAL_FAILURE(RunLoop(&video));
+#if CONFIG_AOM_QM
+ EXPECT_GE(min_psnr_, kMaxPSNR_QM);
+#else
EXPECT_GE(min_psnr_, kMaxPSNR);
+#endif
}
TEST_P(CpuSpeedTest, TestEncodeHighBitrate) {
diff --git a/test/end_to_end_test.cc b/test/end_to_end_test.cc
index 96621dbc27..b436e983d1 100644
--- a/test/end_to_end_test.cc
+++ b/test/end_to_end_test.cc
@@ -132,7 +132,11 @@ class EndToEndTestLarge
}
double GetPsnrThreshold() {
+#if CONFIG_AOM_QM
+ return kPsnrThreshold[cpu_used_][encoding_mode_] - 3.0;
+#else
return kPsnrThreshold[cpu_used_][encoding_mode_];
+#endif
}
TestVideoParam test_video_param_;
diff --git a/test/quantize_test.cc b/test/quantize_test.cc
index ddaa125350..a38b8e698f 100644
--- a/test/quantize_test.cc
+++ b/test/quantize_test.cc
@@ -28,6 +28,7 @@
using libvpx_test::ACMRandom;
namespace {
+#if !CONFIG_AOM_QM
#if CONFIG_VPX_HIGHBITDEPTH
const int number_of_iterations = 100;
@@ -341,4 +342,5 @@ INSTANTIATE_TEST_CASE_P(
&vpx_highbd_quantize_b_32x32_c, VPX_BITS_12)));
#endif // HAVE_SSE2
#endif // CONFIG_VPX_HIGHBITDEPTH
+#endif // CONFIG_AOM_QM
} // namespace
--
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