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Commit 48032bfc authored by Peter de Rivaz's avatar Peter de Rivaz Committed by Deb Mukherjee
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Added sse2 acceleration for highbitdepth variance 

Change-Id: I446bdf3a405e4e9d2aa633d6281d66ea0cdfd79f
(cherry picked from commit d7422b2b1eb9f0011a8c379c2be680d6892b16bc)
(cherry picked from commit 6d741e4d76a7d9ece69ca117d1d9e2f9ee48ef8c)
parent 807885b5
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Showing with 3285 additions and 296 deletions
test/variance_test.cc
View file @ 48032bfc
This diff is collapsed.
vp9/common/vp9_blockd.h
View file @ 48032bfc
......@@ -112,6 +112,9 @@ typedef struct {
// Common for both INTER and INTRA blocks
BLOCK_SIZE sb_type;
PREDICTION_MODE mode;
#if CONFIG_FILTERINTRA
int filterbit, uv_filterbit;
#endif
TX_SIZE tx_size;
int8_t skip;
int8_t segment_id;
......@@ -126,11 +129,18 @@ typedef struct {
int_mv ref_mvs[MAX_REF_FRAMES][MAX_MV_REF_CANDIDATES];
uint8_t mode_context[MAX_REF_FRAMES];
INTERP_FILTER interp_filter;
#if CONFIG_EXT_TX
EXT_TX_TYPE ext_txfrm;
#endif
} MB_MODE_INFO;
typedef struct MODE_INFO {
struct MODE_INFO *src_mi;
MB_MODE_INFO mbmi;
#if CONFIG_FILTERINTRA
int b_filter_info[4];
#endif
b_mode_info bmi[4];
} MODE_INFO;
......@@ -139,6 +149,17 @@ static INLINE PREDICTION_MODE get_y_mode(const MODE_INFO *mi, int block) {
: mi->mbmi.mode;
}
#if CONFIG_FILTERINTRA
static INLINE int is_filter_allowed(PREDICTION_MODE mode) {
(void)mode;
return 1;
}
static INLINE int is_filter_enabled(TX_SIZE txsize) {
return (txsize < TX_SIZES);
}
#endif
static INLINE int is_inter_block(const MB_MODE_INFO *mbmi) {
return mbmi->ref_frame[0] > INTRA_FRAME;
}
......@@ -236,12 +257,33 @@ static INLINE BLOCK_SIZE get_subsize(BLOCK_SIZE bsize,
extern const TX_TYPE intra_mode_to_tx_type_lookup[INTRA_MODES];
#if CONFIG_EXT_TX
static TX_TYPE ext_tx_to_txtype(EXT_TX_TYPE ext_tx) {
switch (ext_tx) {
case NORM:
default:
return DCT_DCT;
case ALT:
return ADST_ADST;
}
}
#endif
static INLINE TX_TYPE get_tx_type(PLANE_TYPE plane_type,
const MACROBLOCKD *xd) {
const MB_MODE_INFO *const mbmi = &xd->mi[0].src_mi->mbmi;
if (plane_type != PLANE_TYPE_Y || is_inter_block(mbmi))
#if CONFIG_EXT_TX
if (plane_type != PLANE_TYPE_Y || xd->lossless)
return DCT_DCT;
if (is_inter_block(mbmi)) {
return ext_tx_to_txtype(mbmi->ext_txfrm);
}
#else
if (plane_type != PLANE_TYPE_Y || xd->lossless || is_inter_block(mbmi))
return DCT_DCT;
#endif
return intra_mode_to_tx_type_lookup[mbmi->mode];
}
......@@ -249,8 +291,17 @@ static INLINE TX_TYPE get_tx_type_4x4(PLANE_TYPE plane_type,
const MACROBLOCKD *xd, int ib) {
const MODE_INFO *const mi = xd->mi[0].src_mi;
#if CONFIG_EXT_TX
if (plane_type != PLANE_TYPE_Y || xd->lossless)
return DCT_DCT;
if (is_inter_block(&mi->mbmi)) {
return ext_tx_to_txtype(mi->mbmi.ext_txfrm);
}
#else
if (plane_type != PLANE_TYPE_Y || xd->lossless || is_inter_block(&mi->mbmi))
return DCT_DCT;
#endif
return intra_mode_to_tx_type_lookup[get_y_mode(mi, ib)];
}
......
vp9/common/vp9_rtcd_defs.pl
View file @ 48032bfc
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vp9/encoder/x86/vp9_highbd_subpel_variance.asm 0 → 100644
View file @ 48032bfc
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vp9/encoder/x86/vp9_highbd_variance_impl_sse2.asm 0 → 100644
View file @ 48032bfc
;
; Copyright (c) 2014 The WebM project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license
; that can be found in the LICENSE file in the root of the source
; tree. An additional intellectual property rights grant can be found
; in the file PATENTS. All contributing project authors may
; be found in the AUTHORS file in the root of the source tree.
;
%include "vpx_ports/x86_abi_support.asm"
;unsigned int vp9_highbd_calc16x16var_sse2
;(
; unsigned char * src_ptr,
; int source_stride,
; unsigned char * ref_ptr,
; int recon_stride,
; unsigned int * SSE,
; int * Sum
;)
global sym(vp9_highbd_calc16x16var_sse2) PRIVATE
sym(vp9_highbd_calc16x16var_sse2):
push rbp
mov rbp, rsp
SHADOW_ARGS_TO_STACK 6
SAVE_XMM 7
push rbx
push rsi
push rdi
; end prolog
mov rsi, arg(0) ;[src_ptr]
mov rdi, arg(2) ;[ref_ptr]
movsxd rax, DWORD PTR arg(1) ;[source_stride]
movsxd rdx, DWORD PTR arg(3) ;[recon_stride]
add rax, rax ; source stride in bytes
add rdx, rdx ; recon stride in bytes
; Prefetch data
prefetcht0 [rsi]
prefetcht0 [rsi+16]
prefetcht0 [rsi+rax]
prefetcht0 [rsi+rax+16]
lea rbx, [rsi+rax*2]
prefetcht0 [rbx]
prefetcht0 [rbx+16]
prefetcht0 [rbx+rax]
prefetcht0 [rbx+rax+16]
prefetcht0 [rdi]
prefetcht0 [rdi+16]
prefetcht0 [rdi+rdx]
prefetcht0 [rdi+rdx+16]
lea rbx, [rdi+rdx*2]
prefetcht0 [rbx]
prefetcht0 [rbx+16]
prefetcht0 [rbx+rdx]
prefetcht0 [rbx+rdx+16]
pxor xmm0, xmm0 ; clear xmm0 for unpack
pxor xmm7, xmm7 ; clear xmm7 for accumulating diffs
pxor xmm6, xmm6 ; clear xmm6 for accumulating sse
mov rcx, 16
.var16loop:
movdqu xmm1, XMMWORD PTR [rsi]
movdqu xmm2, XMMWORD PTR [rdi]
lea rbx, [rsi+rax*2]
prefetcht0 [rbx]
prefetcht0 [rbx+16]
prefetcht0 [rbx+rax]
prefetcht0 [rbx+rax+16]
lea rbx, [rdi+rdx*2]
prefetcht0 [rbx]
prefetcht0 [rbx+16]
prefetcht0 [rbx+rdx]
prefetcht0 [rbx+rdx+16]
pxor xmm5, xmm5
psubw xmm1, xmm2
movdqu xmm3, XMMWORD PTR [rsi+16]
paddw xmm5, xmm1
pmaddwd xmm1, xmm1
movdqu xmm2, XMMWORD PTR [rdi+16]
paddd xmm6, xmm1
psubw xmm3, xmm2
movdqu xmm1, XMMWORD PTR [rsi+rax]
paddw xmm5, xmm3
pmaddwd xmm3, xmm3
movdqu xmm2, XMMWORD PTR [rdi+rdx]
paddd xmm6, xmm3
psubw xmm1, xmm2
movdqu xmm3, XMMWORD PTR [rsi+rax+16]
paddw xmm5, xmm1
pmaddwd xmm1, xmm1
movdqu xmm2, XMMWORD PTR [rdi+rdx+16]
paddd xmm6, xmm1
psubw xmm3, xmm2
paddw xmm5, xmm3
pmaddwd xmm3, xmm3
paddd xmm6, xmm3
movdqa xmm1, xmm5
movdqa xmm2, xmm5
pcmpgtw xmm1, xmm0
pcmpeqw xmm2, xmm0
por xmm1, xmm2
pcmpeqw xmm1, xmm0
movdqa xmm2, xmm5
punpcklwd xmm5, xmm1
punpckhwd xmm2, xmm1
paddd xmm7, xmm5
paddd xmm7, xmm2
lea rsi, [rsi + 2*rax]
lea rdi, [rdi + 2*rdx]
sub rcx, 2
jnz .var16loop
movdqa xmm4, xmm6
punpckldq xmm6, xmm0
punpckhdq xmm4, xmm0
movdqa xmm5, xmm7
paddd xmm6, xmm4
punpckldq xmm7, xmm0
punpckhdq xmm5, xmm0
paddd xmm7, xmm5
movdqa xmm4, xmm6
movdqa xmm5, xmm7
psrldq xmm4, 8
psrldq xmm5, 8
paddd xmm6, xmm4
paddd xmm7, xmm5
mov rdi, arg(4) ; [SSE]
mov rax, arg(5) ; [Sum]
movd DWORD PTR [rdi], xmm6
movd DWORD PTR [rax], xmm7
; begin epilog
pop rdi
pop rsi
pop rbx
RESTORE_XMM
UNSHADOW_ARGS
pop rbp
ret
;unsigned int vp9_highbd_calc8x8var_sse2
;(
; unsigned char * src_ptr,
; int source_stride,
; unsigned char * ref_ptr,
; int recon_stride,
; unsigned int * SSE,
; int * Sum
;)
global sym(vp9_highbd_calc8x8var_sse2) PRIVATE
sym(vp9_highbd_calc8x8var_sse2):
push rbp
mov rbp, rsp
SHADOW_ARGS_TO_STACK 6
SAVE_XMM 7
push rbx
push rsi
push rdi
; end prolog
mov rsi, arg(0) ;[src_ptr]
mov rdi, arg(2) ;[ref_ptr]
movsxd rax, DWORD PTR arg(1) ;[source_stride]
movsxd rdx, DWORD PTR arg(3) ;[recon_stride]
add rax, rax ; source stride in bytes
add rdx, rdx ; recon stride in bytes
; Prefetch data
prefetcht0 [rsi]
prefetcht0 [rsi+rax]
lea rbx, [rsi+rax*2]
prefetcht0 [rbx]
prefetcht0 [rbx+rax]
prefetcht0 [rdi]
prefetcht0 [rdi+rdx]
lea rbx, [rdi+rdx*2]
prefetcht0 [rbx]
prefetcht0 [rbx+rdx]
pxor xmm0, xmm0 ; clear xmm0 for unpack
pxor xmm7, xmm7 ; clear xmm7 for accumulating diffs
pxor xmm6, xmm6 ; clear xmm6 for accumulating sse
mov rcx, 8
.var8loop:
movdqu xmm1, XMMWORD PTR [rsi]
movdqu xmm2, XMMWORD PTR [rdi]
lea rbx, [rsi+rax*4]
prefetcht0 [rbx]
prefetcht0 [rbx+rax]
lea rbx, [rbx+rax*2]
prefetcht0 [rbx]
prefetcht0 [rbx+rax]
lea rbx, [rdi+rdx*4]
prefetcht0 [rbx]
prefetcht0 [rbx+rdx]
lea rbx, [rbx+rdx*2]
prefetcht0 [rbx]
prefetcht0 [rbx+rdx]
pxor xmm5, xmm5
psubw xmm1, xmm2
movdqu xmm3, XMMWORD PTR [rsi+rax]
paddw xmm5, xmm1
pmaddwd xmm1, xmm1
movdqu xmm2, XMMWORD PTR [rdi+rdx]
paddd xmm6, xmm1
lea rsi, [rsi + 2*rax]
lea rdi, [rdi + 2*rdx]
psubw xmm3, xmm2
movdqu xmm1, XMMWORD PTR [rsi]
paddw xmm5, xmm3
pmaddwd xmm3, xmm3
movdqu xmm2, XMMWORD PTR [rdi]
paddd xmm6, xmm3
psubw xmm1, xmm2
movdqu xmm3, XMMWORD PTR [rsi+rax]
paddw xmm5, xmm1
pmaddwd xmm1, xmm1
movdqu xmm2, XMMWORD PTR [rdi+rdx]
paddd xmm6, xmm1
psubw xmm3, xmm2
paddw xmm5, xmm3
pmaddwd xmm3, xmm3
paddd xmm6, xmm3
movdqa xmm1, xmm5
movdqa xmm2, xmm5
pcmpgtw xmm1, xmm0
pcmpeqw xmm2, xmm0
por xmm1, xmm2
pcmpeqw xmm1, xmm0
movdqa xmm2, xmm5
punpcklwd xmm5, xmm1
punpckhwd xmm2, xmm1
paddd xmm7, xmm5
paddd xmm7, xmm2
lea rsi, [rsi + 2*rax]
lea rdi, [rdi + 2*rdx]
sub rcx, 4
jnz .var8loop
movdqa xmm4, xmm6
punpckldq xmm6, xmm0
punpckhdq xmm4, xmm0
movdqa xmm5, xmm7
paddd xmm6, xmm4
punpckldq xmm7, xmm0
punpckhdq xmm5, xmm0
paddd xmm7, xmm5
movdqa xmm4, xmm6
movdqa xmm5, xmm7
psrldq xmm4, 8
psrldq xmm5, 8
paddd xmm6, xmm4
paddd xmm7, xmm5
mov rdi, arg(4) ; [SSE]
mov rax, arg(5) ; [Sum]
movd DWORD PTR [rdi], xmm6
movd DWORD PTR [rax], xmm7
; begin epilog
pop rdi
pop rsi
pop rbx
RESTORE_XMM
UNSHADOW_ARGS
pop rbp
ret
vp9/encoder/x86/vp9_highbd_variance_sse2.c 0 → 100644
View file @ 48032bfc
This diff is collapsed.
vp9/vp9cx.mk
View file @ 48032bfc
......@@ -104,6 +104,7 @@ VP9_CX_SRCS-$(HAVE_SSE3) += encoder/x86/vp9_sad_sse3.asm
VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_quantize_sse2.c
ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_highbd_sad4d_sse2.asm
VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_highbd_variance_impl_sse2.asm
endif
ifeq ($(CONFIG_USE_X86INC),yes)
......@@ -115,6 +116,8 @@ VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_variance_sse2.c
VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_subpel_variance.asm
ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_highbd_sad_sse2.asm
VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_highbd_variance_sse2.c
VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_highbd_subpel_variance.asm
endif
endif
......
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