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Xiph.Org
aom-rav1e
Commits
5d28183f
Commit
5d28183f
authored
Jul 09, 2016
by
Debargha Mukherjee
Committed by
Gerrit Code Review
Jul 09, 2016
Browse files
Options
Browse Files
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Plain Diff
Merge "Refactor and clean up on blend_mask6" into nextgenv2
parents
5b25323c
72ef6d77
Changes
9
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Inline
Side-by-side
Showing
9 changed files
with
218 additions
and
202 deletions
+218
-202
test/blend_mask6b_test.cc
test/blend_mask6b_test.cc
+3
-3
test/test.mk
test/test.mk
+1
-1
test/vp10_wedge_utils_test.cc
test/vp10_wedge_utils_test.cc
+1
-1
vp10/common/reconinter.c
vp10/common/reconinter.c
+30
-30
vpx_dsp/blend_mask.h
vpx_dsp/blend_mask.h
+17
-0
vpx_dsp/blend_mask6b.c
vpx_dsp/blend_mask6b.c
+27
-28
vpx_dsp/vpx_dsp.mk
vpx_dsp/vpx_dsp.mk
+3
-2
vpx_dsp/vpx_dsp_rtcd_defs.pl
vpx_dsp/vpx_dsp_rtcd_defs.pl
+4
-4
vpx_dsp/x86/blend_mask6b_sse4.c
vpx_dsp/x86/blend_mask6b_sse4.c
+132
-133
No files found.
test/blend_mask6_test.cc
→
test/blend_mask6
b
_test.cc
View file @
5d28183f
...
...
@@ -189,7 +189,7 @@ TEST_P(BlendMask6Test8B, ExtremeValues) {
#if HAVE_SSE4_1
INSTANTIATE_TEST_CASE_P
(
SSE4_1_C_COMPARE
,
BlendMask6Test8B
,
::
testing
::
Values
(
make_tuple
(
&
vpx_blend_mask6_c
,
&
vpx_blend_mask6_sse4_1
)));
::
testing
::
Values
(
make_tuple
(
&
vpx_blend_mask6
b
_c
,
&
vpx_blend_mask6
b
_sse4_1
)));
#endif // HAVE_SSE4_1
#if CONFIG_VP9_HIGHBITDEPTH
...
...
@@ -287,8 +287,8 @@ TEST_P(BlendMask6TestHBD, ExtremeValues) {
#if HAVE_SSE4_1
INSTANTIATE_TEST_CASE_P
(
SSE4_1_C_COMPARE
,
BlendMask6TestHBD
,
::
testing
::
Values
(
make_tuple
(
&
vpx_highbd_blend_mask6_c
,
&
vpx_highbd_blend_mask6_sse4_1
)));
::
testing
::
Values
(
make_tuple
(
&
vpx_highbd_blend_mask6
b
_c
,
&
vpx_highbd_blend_mask6
b
_sse4_1
)));
#endif // HAVE_SSE4_1
#endif // CONFIG_VP9_HIGHBITDEPTH
}
// namespace
test/test.mk
View file @
5d28183f
...
...
@@ -182,7 +182,7 @@ LIBVPX_TEST_SRCS-$(CONFIG_VP10_ENCODER) += subtract_test.cc
ifeq
($(CONFIG_EXT_INTER),yes)
LIBVPX_TEST_SRCS-$(HAVE_SSSE3)
+=
masked_variance_test.cc
LIBVPX_TEST_SRCS-$(HAVE_SSSE3)
+=
masked_sad_test.cc
LIBVPX_TEST_SRCS-$(CONFIG_VP10_ENCODER)
+=
blend_mask6_test.cc
LIBVPX_TEST_SRCS-$(CONFIG_VP10_ENCODER)
+=
blend_mask6
b
_test.cc
LIBVPX_TEST_SRCS-$(CONFIG_VP10_ENCODER)
+=
vp10_wedge_utils_test.cc
endif
...
...
test/vp10_wedge_utils_test.cc
View file @
5d28183f
...
...
@@ -104,7 +104,7 @@ TEST_F(WedgeUtilsSSEFuncTest, ResidualBlendingEquiv) {
p1
[
j
]
=
clamp
(
s
[
j
]
+
rng_
(
33
)
-
16
,
0
,
UINT8_MAX
);
}
vpx_blend_mask6
(
p
,
w
,
p0
,
w
,
p1
,
w
,
m
,
w
,
h
,
w
,
0
,
0
);
vpx_blend_mask6
b
(
p
,
w
,
p0
,
w
,
p1
,
w
,
m
,
w
,
h
,
w
,
0
,
0
);
vpx_subtract_block
(
h
,
w
,
r0
,
w
,
s
,
w
,
p0
,
w
);
vpx_subtract_block
(
h
,
w
,
r1
,
w
,
s
,
w
,
p1
,
w
);
...
...
vp10/common/reconinter.c
View file @
5d28183f
...
...
@@ -459,11 +459,11 @@ static void build_masked_compound_wedge_extend(
const
int
subw
=
(
2
<<
b_width_log2_lookup
[
sb_type
])
==
w
;
const
uint8_t
*
mask
=
vp10_get_soft_mask
(
wedge_index
,
wedge_sign
,
sb_type
,
wedge_offset_x
,
wedge_offset_y
);
vpx_blend_mask6
(
dst
,
dst_stride
,
src0
,
src0_stride
,
src1
,
src1_stride
,
mask
,
MASK_MASTER_STRIDE
,
h
,
w
,
subh
,
subw
);
vpx_blend_mask6
b
(
dst
,
dst_stride
,
src0
,
src0_stride
,
src1
,
src1_stride
,
mask
,
MASK_MASTER_STRIDE
,
h
,
w
,
subh
,
subw
);
}
#if CONFIG_VP9_HIGHBITDEPTH
...
...
@@ -479,11 +479,11 @@ static void build_masked_compound_wedge_extend_highbd(
const
int
subw
=
(
2
<<
b_width_log2_lookup
[
sb_type
])
==
w
;
const
uint8_t
*
mask
=
vp10_get_soft_mask
(
wedge_index
,
wedge_sign
,
sb_type
,
wedge_offset_x
,
wedge_offset_y
);
vpx_highbd_blend_mask6
(
dst_8
,
dst_stride
,
src0_8
,
src0_stride
,
src1_8
,
src1_stride
,
mask
,
MASK_MASTER_STRIDE
,
h
,
w
,
subh
,
subw
,
bd
);
vpx_highbd_blend_mask6
b
(
dst_8
,
dst_stride
,
src0_8
,
src0_stride
,
src1_8
,
src1_stride
,
mask
,
MASK_MASTER_STRIDE
,
h
,
w
,
subh
,
subw
,
bd
);
}
#endif // CONFIG_VP9_HIGHBITDEPTH
#endif // CONFIG_SUPERTX
...
...
@@ -500,11 +500,11 @@ static void build_masked_compound_wedge(uint8_t *dst, int dst_stride,
const
int
subw
=
(
2
<<
b_width_log2_lookup
[
sb_type
])
==
w
;
const
uint8_t
*
mask
=
vp10_get_contiguous_soft_mask
(
wedge_index
,
wedge_sign
,
sb_type
);
vpx_blend_mask6
(
dst
,
dst_stride
,
src0
,
src0_stride
,
src1
,
src1_stride
,
mask
,
4
*
num_4x4_blocks_wide_lookup
[
sb_type
],
h
,
w
,
subh
,
subw
);
vpx_blend_mask6
b
(
dst
,
dst_stride
,
src0
,
src0_stride
,
src1
,
src1_stride
,
mask
,
4
*
num_4x4_blocks_wide_lookup
[
sb_type
],
h
,
w
,
subh
,
subw
);
}
#if CONFIG_VP9_HIGHBITDEPTH
...
...
@@ -520,11 +520,11 @@ static void build_masked_compound_wedge_highbd(uint8_t *dst_8, int dst_stride,
const
int
subw
=
(
2
<<
b_width_log2_lookup
[
sb_type
])
==
w
;
const
uint8_t
*
mask
=
vp10_get_contiguous_soft_mask
(
wedge_index
,
wedge_sign
,
sb_type
);
vpx_highbd_blend_mask6
(
dst_8
,
dst_stride
,
src0_8
,
src0_stride
,
src1_8
,
src1_stride
,
mask
,
4
*
num_4x4_blocks_wide_lookup
[
sb_type
],
h
,
w
,
subh
,
subw
,
bd
);
vpx_highbd_blend_mask6
b
(
dst_8
,
dst_stride
,
src0_8
,
src0_stride
,
src1_8
,
src1_stride
,
mask
,
4
*
num_4x4_blocks_wide_lookup
[
sb_type
],
h
,
w
,
subh
,
subw
,
bd
);
}
#endif // CONFIG_VP9_HIGHBITDEPTH
...
...
@@ -1896,11 +1896,11 @@ static void combine_interintra(INTERINTRA_MODE mode,
bsize
);
const
int
subw
=
2
*
num_4x4_blocks_wide_lookup
[
bsize
]
==
bw
;
const
int
subh
=
2
*
num_4x4_blocks_high_lookup
[
bsize
]
==
bh
;
vpx_blend_mask6
(
comppred
,
compstride
,
intrapred
,
intrastride
,
interpred
,
interstride
,
mask
,
4
*
num_4x4_blocks_wide_lookup
[
bsize
],
bh
,
bw
,
subh
,
subw
);
vpx_blend_mask6
b
(
comppred
,
compstride
,
intrapred
,
intrastride
,
interpred
,
interstride
,
mask
,
4
*
num_4x4_blocks_wide_lookup
[
bsize
],
bh
,
bw
,
subh
,
subw
);
}
return
;
}
...
...
@@ -2036,11 +2036,11 @@ static void combine_interintra_highbd(INTERINTRA_MODE mode,
bsize
);
const
int
subh
=
2
*
num_4x4_blocks_high_lookup
[
bsize
]
==
bh
;
const
int
subw
=
2
*
num_4x4_blocks_wide_lookup
[
bsize
]
==
bw
;
vpx_highbd_blend_mask6
(
comppred8
,
compstride
,
intrapred8
,
intrastride
,
interpred8
,
interstride
,
mask
,
bw
,
bh
,
bw
,
subh
,
subw
,
bd
);
vpx_highbd_blend_mask6
b
(
comppred8
,
compstride
,
intrapred8
,
intrastride
,
interpred8
,
interstride
,
mask
,
bw
,
bh
,
bw
,
subh
,
subw
,
bd
);
}
return
;
}
...
...
vpx_dsp/blend_mask.h
0 → 100644
View file @
5d28183f
/*
* Copyright (c) 2016 The WebM project authors. All Rights Reserved.
*
* Use of this source code is governed by a BSD-style license
* that can be found in the LICENSE file in the root of the source
* tree. An additional intellectual property rights grant can be found
* in the file PATENTS. All contributing project authors may
* be found in the AUTHORS file in the root of the source tree.
*/
#ifndef VPX_DSP_BLEND_MASK_H_
#define VPX_DSP_BLEND_MASK_H_
// Use blend_mask6b() for 6 bit masks
#define MASK_BITS6 6
#endif // VPX_DSP_BLEND_MASK_H_
vpx_dsp/blend_mask6.c
→
vpx_dsp/blend_mask6
b
.c
View file @
5d28183f
...
...
@@ -12,17 +12,16 @@
#include "vpx/vpx_integer.h"
#include "vpx_ports/mem.h"
#include "vpx_dsp/blend_mask.h"
#include "vpx_dsp/vpx_dsp_common.h"
#include "./vpx_dsp_rtcd.h"
#define MASK_BITS 6
void
vpx_blend_mask6_c
(
uint8_t
*
dst
,
uint32_t
dst_stride
,
uint8_t
*
src0
,
uint32_t
src0_stride
,
uint8_t
*
src1
,
uint32_t
src1_stride
,
const
uint8_t
*
mask
,
uint32_t
mask_stride
,
int
h
,
int
w
,
int
subh
,
int
subw
)
{
void
vpx_blend_mask6b_c
(
uint8_t
*
dst
,
uint32_t
dst_stride
,
uint8_t
*
src0
,
uint32_t
src0_stride
,
uint8_t
*
src1
,
uint32_t
src1_stride
,
const
uint8_t
*
mask
,
uint32_t
mask_stride
,
int
h
,
int
w
,
int
subh
,
int
subw
)
{
int
i
,
j
;
assert
(
IMPLIES
(
src0
==
dst
,
src0_stride
==
dst_stride
));
...
...
@@ -37,10 +36,10 @@ void vpx_blend_mask6_c(uint8_t *dst, uint32_t dst_stride,
for
(
i
=
0
;
i
<
h
;
++
i
)
for
(
j
=
0
;
j
<
w
;
++
j
)
{
const
int
m0
=
mask
[
i
*
mask_stride
+
j
];
const
int
m1
=
((
1
<<
MASK_BITS
)
-
m0
);
const
int
m1
=
((
1
<<
MASK_BITS
6
)
-
m0
);
dst
[
i
*
dst_stride
+
j
]
=
ROUND_POWER_OF_TWO
(
src0
[
i
*
src0_stride
+
j
]
*
m0
+
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
);
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
6
);
}
}
else
if
(
subw
==
1
&&
subh
==
1
)
{
for
(
i
=
0
;
i
<
h
;
++
i
)
...
...
@@ -51,10 +50,10 @@ void vpx_blend_mask6_c(uint8_t *dst, uint32_t dst_stride,
mask
[(
2
*
i
)
*
mask_stride
+
(
2
*
j
+
1
)]
+
mask
[(
2
*
i
+
1
)
*
mask_stride
+
(
2
*
j
+
1
)],
2
);
const
int
m1
=
((
1
<<
MASK_BITS
)
-
m0
);
const
int
m1
=
((
1
<<
MASK_BITS
6
)
-
m0
);
dst
[
i
*
dst_stride
+
j
]
=
ROUND_POWER_OF_TWO
(
src0
[
i
*
src0_stride
+
j
]
*
m0
+
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
);
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
6
);
}
}
else
if
(
subw
==
1
&&
subh
==
0
)
{
for
(
i
=
0
;
i
<
h
;
++
i
)
...
...
@@ -62,10 +61,10 @@ void vpx_blend_mask6_c(uint8_t *dst, uint32_t dst_stride,
const
int
m0
=
ROUND_POWER_OF_TWO
(
mask
[
i
*
mask_stride
+
(
2
*
j
)]
+
mask
[
i
*
mask_stride
+
(
2
*
j
+
1
)],
1
);
const
int
m1
=
((
1
<<
MASK_BITS
)
-
m0
);
const
int
m1
=
((
1
<<
MASK_BITS
6
)
-
m0
);
dst
[
i
*
dst_stride
+
j
]
=
ROUND_POWER_OF_TWO
(
src0
[
i
*
src0_stride
+
j
]
*
m0
+
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
);
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
6
);
}
}
else
{
for
(
i
=
0
;
i
<
h
;
++
i
)
...
...
@@ -73,20 +72,20 @@ void vpx_blend_mask6_c(uint8_t *dst, uint32_t dst_stride,
const
int
m0
=
ROUND_POWER_OF_TWO
(
mask
[(
2
*
i
)
*
mask_stride
+
j
]
+
mask
[(
2
*
i
+
1
)
*
mask_stride
+
j
],
1
);
const
int
m1
=
((
1
<<
MASK_BITS
)
-
m0
);
const
int
m1
=
((
1
<<
MASK_BITS
6
)
-
m0
);
dst
[
i
*
dst_stride
+
j
]
=
ROUND_POWER_OF_TWO
(
src0
[
i
*
src0_stride
+
j
]
*
m0
+
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
);
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
6
);
}
}
}
#if CONFIG_VP9_HIGHBITDEPTH
void
vpx_highbd_blend_mask6_c
(
uint8_t
*
dst_8
,
uint32_t
dst_stride
,
uint8_t
*
src0_8
,
uint32_t
src0_stride
,
uint8_t
*
src1_8
,
uint32_t
src1_stride
,
const
uint8_t
*
mask
,
uint32_t
mask_stride
,
int
h
,
int
w
,
int
subh
,
int
subw
,
int
bd
)
{
void
vpx_highbd_blend_mask6
b
_c
(
uint8_t
*
dst_8
,
uint32_t
dst_stride
,
uint8_t
*
src0_8
,
uint32_t
src0_stride
,
uint8_t
*
src1_8
,
uint32_t
src1_stride
,
const
uint8_t
*
mask
,
uint32_t
mask_stride
,
int
h
,
int
w
,
int
subh
,
int
subw
,
int
bd
)
{
int
i
,
j
;
uint16_t
*
dst
=
CONVERT_TO_SHORTPTR
(
dst_8
);
uint16_t
*
src0
=
CONVERT_TO_SHORTPTR
(
src0_8
);
...
...
@@ -106,10 +105,10 @@ void vpx_highbd_blend_mask6_c(uint8_t *dst_8, uint32_t dst_stride,
for
(
i
=
0
;
i
<
h
;
++
i
)
for
(
j
=
0
;
j
<
w
;
++
j
)
{
const
int
m0
=
mask
[
i
*
mask_stride
+
j
];
const
int
m1
=
((
1
<<
MASK_BITS
)
-
m0
);
const
int
m1
=
((
1
<<
MASK_BITS
6
)
-
m0
);
dst
[
i
*
dst_stride
+
j
]
=
ROUND_POWER_OF_TWO
(
src0
[
i
*
src0_stride
+
j
]
*
m0
+
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
);
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
6
);
}
}
else
if
(
subw
==
1
&&
subh
==
1
)
{
for
(
i
=
0
;
i
<
h
;
++
i
)
...
...
@@ -120,10 +119,10 @@ void vpx_highbd_blend_mask6_c(uint8_t *dst_8, uint32_t dst_stride,
mask
[(
2
*
i
)
*
mask_stride
+
(
2
*
j
+
1
)]
+
mask
[(
2
*
i
+
1
)
*
mask_stride
+
(
2
*
j
+
1
)],
2
);
const
int
m1
=
((
1
<<
MASK_BITS
)
-
m0
);
const
int
m1
=
((
1
<<
MASK_BITS
6
)
-
m0
);
dst
[
i
*
dst_stride
+
j
]
=
ROUND_POWER_OF_TWO
(
src0
[
i
*
src0_stride
+
j
]
*
m0
+
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
);
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
6
);
}
}
else
if
(
subw
==
1
&&
subh
==
0
)
{
for
(
i
=
0
;
i
<
h
;
++
i
)
...
...
@@ -131,10 +130,10 @@ void vpx_highbd_blend_mask6_c(uint8_t *dst_8, uint32_t dst_stride,
const
int
m0
=
ROUND_POWER_OF_TWO
(
mask
[
i
*
mask_stride
+
(
2
*
j
)]
+
mask
[
i
*
mask_stride
+
(
2
*
j
+
1
)],
1
);
const
int
m1
=
((
1
<<
MASK_BITS
)
-
m0
);
const
int
m1
=
((
1
<<
MASK_BITS
6
)
-
m0
);
dst
[
i
*
dst_stride
+
j
]
=
ROUND_POWER_OF_TWO
(
src0
[
i
*
src0_stride
+
j
]
*
m0
+
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
);
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
6
);
}
}
else
{
for
(
i
=
0
;
i
<
h
;
++
i
)
...
...
@@ -142,10 +141,10 @@ void vpx_highbd_blend_mask6_c(uint8_t *dst_8, uint32_t dst_stride,
const
int
m0
=
ROUND_POWER_OF_TWO
(
mask
[(
2
*
i
)
*
mask_stride
+
j
]
+
mask
[(
2
*
i
+
1
)
*
mask_stride
+
j
],
1
);
const
int
m1
=
((
1
<<
MASK_BITS
)
-
m0
);
const
int
m1
=
((
1
<<
MASK_BITS
6
)
-
m0
);
dst
[
i
*
dst_stride
+
j
]
=
ROUND_POWER_OF_TWO
(
src0
[
i
*
src0_stride
+
j
]
*
m0
+
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
);
src1
[
i
*
src1_stride
+
j
]
*
m1
,
MASK_BITS
6
);
}
}
}
...
...
vpx_dsp/vpx_dsp.mk
View file @
5d28183f
...
...
@@ -71,8 +71,9 @@ DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.c
ifeq
($(CONFIG_VP10),yes)
ifeq
($(CONFIG_EXT_INTER),yes)
DSP_SRCS-yes
+=
blend_mask6.c
DSP_SRCS-$(HAVE_SSE4_1)
+=
x86/blend_mask6_sse4.c
DSP_SRCS-yes
+=
blend_mask6b.c
DSP_SRCS-yes
+=
blend_mask.h
DSP_SRCS-$(HAVE_SSE4_1)
+=
x86/blend_mask6b_sse4.c
endif
#CONFIG_EXT_INTER
endif
#CONFIG_VP10
...
...
vpx_dsp/vpx_dsp_rtcd_defs.pl
View file @
5d28183f
...
...
@@ -1385,12 +1385,12 @@ if (vpx_config("CONFIG_EXT_INTER") eq "yes") {
}
}
add_proto
qw/void vpx_blend_mask6/
,
"
uint8_t *dst, uint32_t dst_stride, uint8_t *src0, uint32_t src0_stride, uint8_t *src1, uint32_t src1_stride, const uint8_t *mask, uint32_t mask_stride, int h, int w, int suby, int subx
";
specialize
"
vpx_blend_mask6
",
qw/sse4_1/
;
add_proto
qw/void vpx_blend_mask6
b
/
,
"
uint8_t *dst, uint32_t dst_stride, uint8_t *src0, uint32_t src0_stride, uint8_t *src1, uint32_t src1_stride, const uint8_t *mask, uint32_t mask_stride, int h, int w, int suby, int subx
";
specialize
"
vpx_blend_mask6
b
",
qw/sse4_1/
;
if
(
vpx_config
("
CONFIG_VP9_HIGHBITDEPTH
")
eq
"
yes
")
{
add_proto
qw/void vpx_highbd_blend_mask6/
,
"
uint8_t *dst, uint32_t dst_stride, uint8_t *src0, uint32_t src0_stride, uint8_t *src1, uint32_t src1_stride, const uint8_t *mask, uint32_t mask_stride, int h, int w, int suby, int subx, int bd
";
specialize
"
vpx_highbd_blend_mask6
",
qw/sse4_1/
;
add_proto
qw/void vpx_highbd_blend_mask6
b
/
,
"
uint8_t *dst, uint32_t dst_stride, uint8_t *src0, uint32_t src0_stride, uint8_t *src1, uint32_t src1_stride, const uint8_t *mask, uint32_t mask_stride, int h, int w, int suby, int subx, int bd
";
specialize
"
vpx_highbd_blend_mask6
b
",
qw/sse4_1/
;
}
}
...
...
vpx_dsp/x86/blend_mask6_sse4.c
→
vpx_dsp/x86/blend_mask6
b
_sse4.c
View file @
5d28183f
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