Commit 6c795765 authored by Steinar Midtskogen's avatar Steinar Midtskogen
Browse files

Fix ubsan warnings

BUG=aomedia:376

Change-Id: Ief69f220ec5b6cf15443f872ad2f9a63336c185d
parent a9d41e88
......@@ -596,8 +596,8 @@ SIMD_INLINE c_v64 c_v64_mulhi_s16(c_v64 a, c_v64 b) {
SIMD_INLINE c_v64 c_v64_mullo_s32(c_v64 a, c_v64 b) {
c_v64 t;
t.s32[0] = a.s32[0] * b.s32[0];
t.s32[1] = a.s32[1] * b.s32[1];
t.s32[0] = (int32_t)((int64_t)a.s32[0] * b.s32[0]);
t.s32[1] = (int32_t)((int64_t)a.s32[1] * b.s32[1]);
return t;
}
......
......@@ -238,7 +238,7 @@ uint32_t c_v64_sad_u8(c_v64 a, c_v64 b) {
uint32_t c_v64_ssd_u8(c_v64 a, c_v64 b) {
return c_v64_ssd_u8_sum(::c_v64_ssd_u8(c_v64_ssd_u8_init(), a, b));
}
int32_t v128_sad_u8(v128 a, v128 b) {
uint32_t v128_sad_u8(v128 a, v128 b) {
return v128_sad_u8_sum(::v128_sad_u8(v128_sad_u8_init(), a, b));
}
uint32_t v128_ssd_u8(v128 a, v128 b) {
......@@ -712,20 +712,48 @@ void SetMask(uint8_t *s, int size, uint32_t mask, uint32_t maskwidth) {
}
}
// We need load/store functions for uint64_t
// We need some extra load/store functions
void u64_store_aligned(void *p, uint64_t a) {
v64_store_aligned(p, v64_from_64(a));
}
void s32_store_aligned(void *p, int32_t a) {
u32_store_aligned(p, static_cast<uint32_t>(a));
}
void s64_store_aligned(void *p, int64_t a) {
v64_store_aligned(p, v64_from_64(static_cast<uint64_t>(a)));
}
void c_u64_store_aligned(void *p, uint64_t a) {
c_v64_store_aligned(p, c_v64_from_64(a));
}
uint64_t u64_load_aligned(void *p) { return v64_u64(v64_load_aligned(p)); }
void c_s32_store_aligned(void *p, int32_t a) {
c_u32_store_aligned(p, static_cast<uint32_t>(a));
}
void c_s64_store_aligned(void *p, int64_t a) {
c_v64_store_aligned(p, c_v64_from_64(static_cast<uint64_t>(a)));
}
uint64_t u64_load_aligned(const void *p) {
return v64_u64(v64_load_aligned(p));
}
uint16_t u16_load_aligned(const void *p) {
return *(reinterpret_cast<const uint16_t *>(p));
}
uint8_t u8_load_aligned(const void *p) {
return *(reinterpret_cast<const uint8_t *>(p));
}
uint64_t c_u64_load_aligned(void *p) {
uint64_t c_u64_load_aligned(const void *p) {
return c_v64_u64(c_v64_load_aligned(p));
}
uint16_t c_u16_load_aligned(const void *p) {
return *(reinterpret_cast<const uint16_t *>(p));
}
uint8_t c_u8_load_aligned(const void *p) {
return *(reinterpret_cast<const uint8_t *>(p));
}
// CompareSimd1Arg and CompareSimd2Args compare intrinsics taking 1 or
// 2 arguments respectively with their corresponding C reference.
......@@ -815,6 +843,22 @@ void TestSimd1Arg(uint32_t iterations, uint32_t mask, uint32_t maskwidth,
reinterpret_cast<fptr>(v64_load_aligned), simd, d,
reinterpret_cast<fptr>(c_v64_store_aligned),
reinterpret_cast<fptr>(c_v64_load_aligned), ref_simd, ref_d, s);
} else if (typeid(CRet) == typeid(c_v64) &&
typeid(CArg) == typeid(uint8_t)) {
// V64_U8
error = CompareSimd1Arg<v64, uint8_t, CRet, CArg>(
reinterpret_cast<fptr>(v64_store_aligned),
reinterpret_cast<fptr>(u8_load_aligned), simd, d,
reinterpret_cast<fptr>(c_v64_store_aligned),
reinterpret_cast<fptr>(c_u8_load_aligned), ref_simd, ref_d, s);
} else if (typeid(CRet) == typeid(c_v64) &&
typeid(CArg) == typeid(uint16_t)) {
// V64_U16
error = CompareSimd1Arg<v64, uint16_t, CRet, CArg>(
reinterpret_cast<fptr>(v64_store_aligned),
reinterpret_cast<fptr>(u16_load_aligned), simd, d,
reinterpret_cast<fptr>(c_v64_store_aligned),
reinterpret_cast<fptr>(c_u16_load_aligned), ref_simd, ref_d, s);
} else if (typeid(CRet) == typeid(c_v64) &&
typeid(CArg) == typeid(uint32_t)) {
// V64_U32
......@@ -831,6 +875,14 @@ void TestSimd1Arg(uint32_t iterations, uint32_t mask, uint32_t maskwidth,
reinterpret_cast<fptr>(v64_load_aligned), simd, d,
reinterpret_cast<fptr>(c_u64_store_aligned),
reinterpret_cast<fptr>(c_v64_load_aligned), ref_simd, ref_d, s);
} else if (typeid(CRet) == typeid(int64_t) &&
typeid(CArg) == typeid(c_v64)) {
// S64_V64
error = CompareSimd1Arg<int64_t, v64, CRet, CArg>(
reinterpret_cast<fptr>(s64_store_aligned),
reinterpret_cast<fptr>(v64_load_aligned), simd, d,
reinterpret_cast<fptr>(c_s64_store_aligned),
reinterpret_cast<fptr>(c_v64_load_aligned), ref_simd, ref_d, s);
} else if (typeid(CRet) == typeid(uint32_t) &&
typeid(CArg) == typeid(c_v64)) {
// U32_V64
......@@ -839,6 +891,14 @@ void TestSimd1Arg(uint32_t iterations, uint32_t mask, uint32_t maskwidth,
reinterpret_cast<fptr>(v64_load_aligned), simd, d,
reinterpret_cast<fptr>(c_u32_store_aligned),
reinterpret_cast<fptr>(c_v64_load_aligned), ref_simd, ref_d, s);
} else if (typeid(CRet) == typeid(int32_t) &&
typeid(CArg) == typeid(c_v64)) {
// S32_V64
error = CompareSimd1Arg<int32_t, v64, CRet, CArg>(
reinterpret_cast<fptr>(s32_store_aligned),
reinterpret_cast<fptr>(v64_load_aligned), simd, d,
reinterpret_cast<fptr>(c_s32_store_aligned),
reinterpret_cast<fptr>(c_v64_load_aligned), ref_simd, ref_d, s);
} else if (typeid(CRet) == typeid(uint32_t) &&
typeid(CArg) == typeid(c_v128)) {
// U32_V128
......@@ -879,6 +939,22 @@ void TestSimd1Arg(uint32_t iterations, uint32_t mask, uint32_t maskwidth,
reinterpret_cast<fptr>(v64_load_aligned), simd, d,
reinterpret_cast<fptr>(c_v128_store_aligned),
reinterpret_cast<fptr>(c_v64_load_aligned), ref_simd, ref_d, s);
} else if (typeid(CRet) == typeid(c_v128) &&
typeid(CArg) == typeid(uint8_t)) {
// V128_U8
error = CompareSimd1Arg<v128, uint8_t, CRet, CArg>(
reinterpret_cast<fptr>(v128_store_aligned),
reinterpret_cast<fptr>(u8_load_aligned), simd, d,
reinterpret_cast<fptr>(c_v128_store_aligned),
reinterpret_cast<fptr>(c_u8_load_aligned), ref_simd, ref_d, s);
} else if (typeid(CRet) == typeid(c_v128) &&
typeid(CArg) == typeid(uint16_t)) {
// V128_U16
error = CompareSimd1Arg<v128, uint16_t, CRet, CArg>(
reinterpret_cast<fptr>(v128_store_aligned),
reinterpret_cast<fptr>(u16_load_aligned), simd, d,
reinterpret_cast<fptr>(c_v128_store_aligned),
reinterpret_cast<fptr>(c_u16_load_aligned), ref_simd, ref_d, s);
} else if (typeid(CRet) == typeid(c_v128) &&
typeid(CArg) == typeid(uint32_t)) {
// V128_U32
......@@ -970,10 +1046,10 @@ void TestSimd2Args(uint32_t iterations, uint32_t mask, uint32_t maskwidth,
typeid(CArg2) == typeid(c_v64)) {
// S64_V64V64
error = CompareSimd2Args<int64_t, v64, v64, CRet, CArg1, CArg2>(
reinterpret_cast<fptr>(u64_store_aligned),
reinterpret_cast<fptr>(s64_store_aligned),
reinterpret_cast<fptr>(v64_load_aligned),
reinterpret_cast<fptr>(v64_load_aligned), simd, d,
reinterpret_cast<fptr>(c_u64_store_aligned),
reinterpret_cast<fptr>(c_s64_store_aligned),
reinterpret_cast<fptr>(c_v64_load_aligned),
reinterpret_cast<fptr>(c_v64_load_aligned),
reinterpret_cast<fptr>(ref_simd), ref_d, s1, s2);
......@@ -1018,10 +1094,10 @@ void TestSimd2Args(uint32_t iterations, uint32_t mask, uint32_t maskwidth,
typeid(CArg2) == typeid(c_v128)) {
// S64_V128V128
error = CompareSimd2Args<int64_t, v128, v128, CRet, CArg1, CArg2>(
reinterpret_cast<fptr>(u64_store_aligned),
reinterpret_cast<fptr>(s64_store_aligned),
reinterpret_cast<fptr>(v128_load_aligned),
reinterpret_cast<fptr>(v128_load_aligned), simd, d,
reinterpret_cast<fptr>(c_u64_store_aligned),
reinterpret_cast<fptr>(c_s64_store_aligned),
reinterpret_cast<fptr>(c_v128_load_aligned),
reinterpret_cast<fptr>(c_v128_load_aligned),
reinterpret_cast<fptr>(ref_simd), ref_d, s1, s2);
......@@ -1077,14 +1153,22 @@ void TestSimd2Args(uint32_t iterations, uint32_t mask, uint32_t maskwidth,
}
// Instantiations to make the functions callable from another files
template void TestSimd1Arg<c_v64, uint8_t>(uint32_t, uint32_t, uint32_t,
const char *);
template void TestSimd1Arg<c_v64, uint16_t>(uint32_t, uint32_t, uint32_t,
const char *);
template void TestSimd1Arg<c_v64, uint32_t>(uint32_t, uint32_t, uint32_t,
const char *);
template void TestSimd1Arg<c_v64, c_v64>(uint32_t, uint32_t, uint32_t,
const char *);
template void TestSimd1Arg<uint32_t, c_v64>(uint32_t, uint32_t, uint32_t,
const char *);
template void TestSimd1Arg<int32_t, c_v64>(uint32_t, uint32_t, uint32_t,
const char *);
template void TestSimd1Arg<uint64_t, c_v64>(uint32_t, uint32_t, uint32_t,
const char *);
template void TestSimd1Arg<int64_t, c_v64>(uint32_t, uint32_t, uint32_t,
const char *);
template void TestSimd2Args<c_v64, uint32_t, uint32_t>(uint32_t, uint32_t,
uint32_t, const char *);
template void TestSimd2Args<c_v64, c_v64, c_v64>(uint32_t, uint32_t, uint32_t,
......@@ -1097,6 +1181,10 @@ template void TestSimd2Args<uint32_t, c_v64, c_v64>(uint32_t, uint32_t,
uint32_t, const char *);
template void TestSimd1Arg<c_v128, c_v128>(uint32_t, uint32_t, uint32_t,
const char *);
template void TestSimd1Arg<c_v128, uint8_t>(uint32_t, uint32_t, uint32_t,
const char *);
template void TestSimd1Arg<c_v128, uint16_t>(uint32_t, uint32_t, uint32_t,
const char *);
template void TestSimd1Arg<c_v128, uint32_t>(uint32_t, uint32_t, uint32_t,
const char *);
template void TestSimd1Arg<c_v128, c_v64>(uint32_t, uint32_t, uint32_t,
......
......@@ -40,10 +40,14 @@ class TestIntrinsic : public ::testing::TestWithParam<param_signature> {
typedef TestIntrinsic<std::tr1::tuple<uint32_t, uint32_t, const char *> > \
ARCH_POSTFIX(name)
TYPEDEF_SIMD(V64_U8);
TYPEDEF_SIMD(V64_U16);
TYPEDEF_SIMD(V64_U32);
TYPEDEF_SIMD(V64_V64);
TYPEDEF_SIMD(U32_V64);
TYPEDEF_SIMD(S32_V64);
TYPEDEF_SIMD(U64_V64);
TYPEDEF_SIMD(S64_V64);
TYPEDEF_SIMD(V64_U32U32);
TYPEDEF_SIMD(V64_V64V64);
TYPEDEF_SIMD(S64_V64V64);
......@@ -54,6 +58,8 @@ TYPEDEF_SIMD(V128_V128);
TYPEDEF_SIMD(U32_V128);
TYPEDEF_SIMD(U64_V128);
TYPEDEF_SIMD(V64_V128);
TYPEDEF_SIMD(V128_U8);
TYPEDEF_SIMD(V128_U16);
TYPEDEF_SIMD(V128_U32);
TYPEDEF_SIMD(V128_U64U64);
TYPEDEF_SIMD(V128_V64V64);
......@@ -84,6 +90,14 @@ const int kIterations = 65536;
// expand it first with the prefix.
#define MY_TEST_P(name, test) TEST_P(name, test)
MY_TEST_P(ARCH_POSTFIX(V64_U8), TestIntrinsics) {
TestSimd1Arg<c_v64, uint8_t>(kIterations, mask, maskwidth, name);
}
MY_TEST_P(ARCH_POSTFIX(V64_U16), TestIntrinsics) {
TestSimd1Arg<c_v64, uint16_t>(kIterations, mask, maskwidth, name);
}
MY_TEST_P(ARCH_POSTFIX(V64_U32), TestIntrinsics) {
TestSimd1Arg<c_v64, uint32_t>(kIterations, mask, maskwidth, name);
}
......@@ -96,10 +110,18 @@ MY_TEST_P(ARCH_POSTFIX(U64_V64), TestIntrinsics) {
TestSimd1Arg<uint64_t, c_v64>(kIterations, mask, maskwidth, name);
}
MY_TEST_P(ARCH_POSTFIX(S64_V64), TestIntrinsics) {
TestSimd1Arg<int64_t, c_v64>(kIterations, mask, maskwidth, name);
}
MY_TEST_P(ARCH_POSTFIX(U32_V64), TestIntrinsics) {
TestSimd1Arg<uint32_t, c_v64>(kIterations, mask, maskwidth, name);
}
MY_TEST_P(ARCH_POSTFIX(S32_V64), TestIntrinsics) {
TestSimd1Arg<int32_t, c_v64>(kIterations, mask, maskwidth, name);
}
MY_TEST_P(ARCH_POSTFIX(V64_U32U32), TestIntrinsics) {
TestSimd2Args<c_v64, uint32_t, uint32_t>(kIterations, mask, maskwidth, name);
}
......@@ -145,6 +167,14 @@ MY_TEST_P(ARCH_POSTFIX(V128_V128), TestIntrinsics) {
TestSimd1Arg<c_v128, c_v128>(kIterations, mask, maskwidth, name);
}
MY_TEST_P(ARCH_POSTFIX(V128_U8), TestIntrinsics) {
TestSimd1Arg<c_v128, uint8_t>(kIterations, mask, maskwidth, name);
}
MY_TEST_P(ARCH_POSTFIX(V128_U16), TestIntrinsics) {
TestSimd1Arg<c_v128, uint16_t>(kIterations, mask, maskwidth, name);
}
MY_TEST_P(ARCH_POSTFIX(V128_U32), TestIntrinsics) {
TestSimd1Arg<c_v128, uint32_t>(kIterations, mask, maskwidth, name);
}
......@@ -333,19 +363,25 @@ INSTANTIATE(ARCH, ARCH_POSTFIX(V64_V64U32), SIMD_TUPLE(v64_shl_8, 7U, 32U),
SIMD_TUPLE(v64_shr_u32, 31U, 32U),
SIMD_TUPLE(v64_shr_s32, 31U, 32U));
INSTANTIATE(ARCH, ARCH_POSTFIX(U64_V64), SIMD_TUPLE(v64_hadd_u8, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(U64_V64), SIMD_TUPLE(v64_hadd_u8, 0U, 0U),
SIMD_TUPLE(v64_u64, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(S64_V64), SIMD_TUPLE(v64_hadd_s16, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(U32_V64), SIMD_TUPLE(v64_low_u32, 0U, 0U),
SIMD_TUPLE(v64_high_u32, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(U32_V64), SIMD_TUPLE(v64_u64, 0U, 0U),
SIMD_TUPLE(v64_low_u32, 0U, 0U), SIMD_TUPLE(v64_high_u32, 0U, 0U),
SIMD_TUPLE(v64_hadd_s16, 0U, 0U), SIMD_TUPLE(v64_low_s32, 0U, 0U),
INSTANTIATE(ARCH, ARCH_POSTFIX(S32_V64), SIMD_TUPLE(v64_low_s32, 0U, 0U),
SIMD_TUPLE(v64_high_s32, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(S64_V64V64), SIMD_TUPLE(v64_dotp_s16, 0U, 0U),
SIMD_TUPLE(v64_dotp_su8, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(V64_U32), SIMD_TUPLE(v64_dup_8, 0xffU, 32U),
SIMD_TUPLE(v64_dup_16, 0xffffU, 32U),
SIMD_TUPLE(v64_dup_32, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(V64_U8), SIMD_TUPLE(v64_dup_8, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(V64_U16), SIMD_TUPLE(v64_dup_16, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(V64_U32), SIMD_TUPLE(v64_dup_32, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(V64_U32U32), SIMD_TUPLE(v64_from_32, 0U, 0U));
......@@ -538,9 +574,11 @@ INSTANTIATE(ARCH, ARCH_POSTFIX(U64_V128), SIMD_TUPLE(v128_hadd_u8, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(V64_V128), SIMD_TUPLE(v128_low_v64, 0U, 0U),
SIMD_TUPLE(v128_high_v64, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(V128_U32), SIMD_TUPLE(v128_dup_8, 0xffU, 32U),
SIMD_TUPLE(v128_dup_16, 0xffffU, 32U),
SIMD_TUPLE(v128_dup_32, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(V128_U8), SIMD_TUPLE(v128_dup_8, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(V128_U16), SIMD_TUPLE(v128_dup_16, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(V128_U32), SIMD_TUPLE(v128_dup_32, 0U, 0U));
INSTANTIATE(ARCH, ARCH_POSTFIX(S64_V128V128),
SIMD_TUPLE(v128_dotp_s16, 0U, 0U));
......
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