Commit a39e83d7 authored by Jingning Han's avatar Jingning Han

Refactor vp10_drl_idx concept

Remove the implicit assumption on offsetting the index by 1.

Change-Id: I6f1d391e067d57b7e45b9287e866014dbc16da71
parent 57c83b33
......@@ -260,16 +260,16 @@ static INLINE int16_t vp10_mode_context_analyzer(
static INLINE uint8_t vp10_drl_ctx(const CANDIDATE_MV *ref_mv_stack,
int ref_idx) {
if (ref_mv_stack[ref_idx + 1].weight > REF_CAT_LEVEL &&
ref_mv_stack[ref_idx + 2].weight > REF_CAT_LEVEL)
if (ref_mv_stack[ref_idx].weight > REF_CAT_LEVEL &&
ref_mv_stack[ref_idx + 1].weight > REF_CAT_LEVEL)
return 0;
if (ref_mv_stack[ref_idx + 1].weight > REF_CAT_LEVEL &&
ref_mv_stack[ref_idx + 2].weight < REF_CAT_LEVEL)
if (ref_mv_stack[ref_idx].weight > REF_CAT_LEVEL &&
ref_mv_stack[ref_idx + 1].weight < REF_CAT_LEVEL)
return 1;
if (ref_mv_stack[ref_idx + 1].weight < REF_CAT_LEVEL &&
ref_mv_stack[ref_idx + 2].weight < REF_CAT_LEVEL)
if (ref_mv_stack[ref_idx].weight < REF_CAT_LEVEL &&
ref_mv_stack[ref_idx + 1].weight < REF_CAT_LEVEL)
return 2;
assert(0);
......
......@@ -156,7 +156,7 @@ static void read_drl_idx(const VP10_COMMON *cm,
mbmi->ref_mv_idx = 0;
if (xd->ref_mv_count[ref_frame_type] > 2) {
uint8_t drl0_ctx = vp10_drl_ctx(xd->ref_mv_stack[ref_frame_type], 0);
uint8_t drl0_ctx = vp10_drl_ctx(xd->ref_mv_stack[ref_frame_type], 1);
vpx_prob drl0_prob = cm->fc->drl_prob0[drl0_ctx];
if (vpx_read(r, drl0_prob)) {
mbmi->ref_mv_idx = 1;
......@@ -164,7 +164,7 @@ static void read_drl_idx(const VP10_COMMON *cm,
++xd->counts->drl_mode0[drl0_ctx][1];
if (xd->ref_mv_count[ref_frame_type] > 3) {
uint8_t drl1_ctx =
vp10_drl_ctx(xd->ref_mv_stack[ref_frame_type], 1);
vp10_drl_ctx(xd->ref_mv_stack[ref_frame_type], 2);
vpx_prob drl1_prob = cm->fc->drl_prob1[drl1_ctx];
if (vpx_read(r, drl1_prob)) {
mbmi->ref_mv_idx = 2;
......
......@@ -185,13 +185,13 @@ static void write_drl_idx(const VP10_COMMON *cm,
uint8_t ref_frame_type = vp10_ref_frame_type(mbmi->ref_frame);
if (mbmi_ext->ref_mv_count[ref_frame_type] > 2) {
uint8_t drl0_ctx =
vp10_drl_ctx(mbmi_ext->ref_mv_stack[ref_frame_type], 0);
vp10_drl_ctx(mbmi_ext->ref_mv_stack[ref_frame_type], 1);
vpx_prob drl0_prob = cm->fc->drl_prob0[drl0_ctx];
vpx_write(w, mbmi->ref_mv_idx != 0, drl0_prob);
if (mbmi_ext->ref_mv_count[ref_frame_type] > 3 &&
mbmi->ref_mv_idx > 0) {
uint8_t drl1_ctx =
vp10_drl_ctx(mbmi_ext->ref_mv_stack[ref_frame_type], 1);
vp10_drl_ctx(mbmi_ext->ref_mv_stack[ref_frame_type], 2);
vpx_prob drl1_prob = cm->fc->drl_prob1[drl1_ctx];
vpx_write(w, mbmi->ref_mv_idx != 1, drl1_prob);
}
......
......@@ -1827,7 +1827,7 @@ static void update_stats(VP10_COMMON *cm, ThreadData *td
uint8_t ref_frame_type = vp10_ref_frame_type(mbmi->ref_frame);
if (mbmi_ext->ref_mv_count[ref_frame_type] > 2) {
uint8_t drl0_ctx =
vp10_drl_ctx(mbmi_ext->ref_mv_stack[ref_frame_type], 0);
vp10_drl_ctx(mbmi_ext->ref_mv_stack[ref_frame_type], 1);
if (mbmi->ref_mv_idx == 0)
++counts->drl_mode0[drl0_ctx][0];
else
......@@ -1836,7 +1836,7 @@ static void update_stats(VP10_COMMON *cm, ThreadData *td
if (mbmi_ext->ref_mv_count[ref_frame_type] > 3 &&
mbmi->ref_mv_idx > 0) {
uint8_t drl1_ctx =
vp10_drl_ctx(mbmi_ext->ref_mv_stack[ref_frame_type], 1);
vp10_drl_ctx(mbmi_ext->ref_mv_stack[ref_frame_type], 2);
if (mbmi->ref_mv_idx == 1)
++counts->drl_mode1[drl1_ctx][0];
else
......
......@@ -6435,7 +6435,7 @@ void vp10_rd_pick_inter_mode_sb(VP10_COMP *cpi,
int ref_set = VPXMIN(2, mbmi_ext->ref_mv_count[ref_frame_type] - 2);
uint8_t drl0_ctx =
vp10_drl_ctx(mbmi_ext->ref_mv_stack[ref_frame_type], 0);
vp10_drl_ctx(mbmi_ext->ref_mv_stack[ref_frame_type], 1);
rate2 += cpi->drl_mode_cost0[drl0_ctx][0];
if (this_rd < INT64_MAX) {
......@@ -6500,7 +6500,7 @@ void vp10_rd_pick_inter_mode_sb(VP10_COMP *cpi,
if (mbmi_ext->ref_mv_count[ref_frame_type] > 3) {
uint8_t drl1_ctx =
vp10_drl_ctx(mbmi_ext->ref_mv_stack[ref_frame_type], 1);
vp10_drl_ctx(mbmi_ext->ref_mv_stack[ref_frame_type], 2);
tmp_rate += cpi->drl_mode_cost1[drl1_ctx][ref_idx];
}
......
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