Commit a6a4659b authored by Jingning Han's avatar Jingning Han

Factor 32x32 fwd DCT to vpx_dsp folder

Move the 32x32 2D-DCT implementations from vp9/ to vpx_dsp/.

Change-Id: Id3980696f8b69906ff7a59ff9fb2b9013d60047d
parent 8eefb36c
......@@ -12,14 +12,15 @@
#include <stdlib.h>
#include <string.h>
#include "third_party/googletest/src/include/gtest/gtest.h"
#include "test/acm_random.h"
#include "test/clear_system_state.h"
#include "test/register_state_check.h"
#include "test/util.h"
#include "third_party/googletest/src/include/gtest/gtest.h"
#include "./vpx_config.h"
#include "./vp9_rtcd.h"
#include "./vpx_config.h"
#include "./vpx_dsp_rtcd.h"
#include "vp9/common/vp9_entropy.h"
#include "vpx/vpx_codec.h"
#include "vpx/vpx_integer.h"
......
......@@ -837,12 +837,6 @@ if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") {
add_proto qw/void vp9_fdct32x32_1/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct32x32_1 sse2/;
add_proto qw/void vp9_fdct32x32/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct32x32 sse2/;
add_proto qw/void vp9_fdct32x32_rd/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct32x32_rd sse2/;
} else {
add_proto qw/void vp9_fht4x4/, "const int16_t *input, tran_low_t *output, int stride, int tx_type";
specialize qw/vp9_fht4x4 sse2 msa/;
......@@ -867,12 +861,6 @@ if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") {
add_proto qw/void vp9_fdct32x32_1/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct32x32_1 sse2 msa/;
add_proto qw/void vp9_fdct32x32/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct32x32 sse2 avx2 msa/;
add_proto qw/void vp9_fdct32x32_rd/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct32x32_rd sse2 avx2 msa/;
}
#
......@@ -935,12 +923,6 @@ if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") {
add_proto qw/void vp9_highbd_fdct32x32_1/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_highbd_fdct32x32_1/;
add_proto qw/void vp9_highbd_fdct32x32/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_highbd_fdct32x32 sse2/;
add_proto qw/void vp9_highbd_fdct32x32_rd/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_highbd_fdct32x32_rd sse2/;
add_proto qw/void vp9_highbd_temporal_filter_apply/, "uint8_t *frame1, unsigned int stride, uint8_t *frame2, unsigned int block_width, unsigned int block_height, int strength, int filter_weight, unsigned int *accumulator, uint16_t *count";
specialize qw/vp9_highbd_temporal_filter_apply/;
......
This diff is collapsed.
......@@ -96,22 +96,6 @@
HADD_SW_S32(vec_w_m); \
})
#define FDCT_POSTPROC_2V_NEG_H(vec0, vec1) { \
v8i16 tp0_m, tp1_m; \
v8i16 one_m = __msa_ldi_h(1); \
\
tp0_m = __msa_clti_s_h(vec0, 0); \
tp1_m = __msa_clti_s_h(vec1, 0); \
vec0 += 1; \
vec1 += 1; \
tp0_m = one_m & tp0_m; \
tp1_m = one_m & tp1_m; \
vec0 += tp0_m; \
vec1 += tp1_m; \
vec0 >>= 2; \
vec1 >>= 2; \
}
#define VP9_FADST4(in0, in1, in2, in3, out0, out1, out2, out3) { \
v4i32 s0_m, s1_m, s2_m, s3_m, constant_m; \
v4i32 in0_r_m, in1_r_m, in2_r_m, in3_r_m; \
......@@ -145,67 +129,4 @@
PCKEV_H4_SH(in0_r_m, in0_r_m, in1_r_m, in1_r_m, s2_m, s2_m, \
s3_m, s3_m, out0, out1, out2, out3); \
}
#define FDCT32_POSTPROC_NEG_W(vec) { \
v4i32 temp_m; \
v4i32 one_m = __msa_ldi_w(1); \
\
temp_m = __msa_clti_s_w(vec, 0); \
vec += 1; \
temp_m = one_m & temp_m; \
vec += temp_m; \
vec >>= 2; \
}
#define FDCT32_POSTPROC_2V_POS_H(vec0, vec1) { \
v8i16 tp0_m, tp1_m; \
v8i16 one = __msa_ldi_h(1); \
\
tp0_m = __msa_clei_s_h(vec0, 0); \
tp1_m = __msa_clei_s_h(vec1, 0); \
tp0_m = (v8i16)__msa_xori_b((v16u8)tp0_m, 255); \
tp1_m = (v8i16)__msa_xori_b((v16u8)tp1_m, 255); \
vec0 += 1; \
vec1 += 1; \
tp0_m = one & tp0_m; \
tp1_m = one & tp1_m; \
vec0 += tp0_m; \
vec1 += tp1_m; \
vec0 >>= 2; \
vec1 >>= 2; \
}
#define DOTP_CONST_PAIR_W(reg0_left, reg1_left, reg0_right, \
reg1_right, const0, const1, \
out0, out1, out2, out3) { \
v4i32 s0_m, s1_m, s2_m, s3_m, s4_m, s5_m, s6_m, s7_m; \
v2i64 tp0_m, tp1_m, tp2_m, tp3_m; \
v4i32 k0_m = __msa_fill_w((int32_t) const0); \
\
s0_m = __msa_fill_w((int32_t) const1); \
k0_m = __msa_ilvev_w(s0_m, k0_m); \
\
ILVRL_W2_SW(-reg1_left, reg0_left, s1_m, s0_m); \
ILVRL_W2_SW(reg0_left, reg1_left, s3_m, s2_m); \
ILVRL_W2_SW(-reg1_right, reg0_right, s5_m, s4_m); \
ILVRL_W2_SW(reg0_right, reg1_right, s7_m, s6_m); \
\
DOTP_SW2_SD(s0_m, s1_m, k0_m, k0_m, tp0_m, tp1_m); \
DOTP_SW2_SD(s4_m, s5_m, k0_m, k0_m, tp2_m, tp3_m); \
tp0_m = __msa_srari_d(tp0_m, DCT_CONST_BITS); \
tp1_m = __msa_srari_d(tp1_m, DCT_CONST_BITS); \
tp2_m = __msa_srari_d(tp2_m, DCT_CONST_BITS); \
tp3_m = __msa_srari_d(tp3_m, DCT_CONST_BITS); \
out0 = __msa_pckev_w((v4i32)tp0_m, (v4i32)tp1_m); \
out1 = __msa_pckev_w((v4i32)tp2_m, (v4i32)tp3_m); \
\
DOTP_SW2_SD(s2_m, s3_m, k0_m, k0_m, tp0_m, tp1_m); \
DOTP_SW2_SD(s6_m, s7_m, k0_m, k0_m, tp2_m, tp3_m); \
tp0_m = __msa_srari_d(tp0_m, DCT_CONST_BITS); \
tp1_m = __msa_srari_d(tp1_m, DCT_CONST_BITS); \
tp2_m = __msa_srari_d(tp2_m, DCT_CONST_BITS); \
tp3_m = __msa_srari_d(tp3_m, DCT_CONST_BITS); \
out2 = __msa_pckev_w((v4i32)tp0_m, (v4i32)tp1_m); \
out3 = __msa_pckev_w((v4i32)tp2_m, (v4i32)tp3_m); \
}
#endif /* VP9_ENCODER_MIPS_MSA_VP9_FDCT_MSA_H_ */
This diff is collapsed.
......@@ -2266,47 +2266,3 @@ void vp9_fdct32x32_1_sse2(const int16_t *input, tran_low_t *output,
in1 = _mm_srai_epi32(in1, 3);
store_output(&in1, output);
}
/*
* The DCTnxn functions are defined using the macros below. The main code for
* them is in separate files (vp9/encoder/x86/vp9_dct_sse2_impl.h &
* vp9/encoder/x86/vp9_dct32x32_sse2_impl.h) which are used by both the 8 bit code
* and the high bit depth code.
*/
#define DCT_HIGH_BIT_DEPTH 0
#define FDCT32x32_2D vp9_fdct32x32_rd_sse2
#define FDCT32x32_HIGH_PRECISION 0
#include "vp9/encoder/x86/vp9_dct32x32_sse2_impl.h"
#undef FDCT32x32_2D
#undef FDCT32x32_HIGH_PRECISION
#define FDCT32x32_2D vp9_fdct32x32_sse2
#define FDCT32x32_HIGH_PRECISION 1
#include "vp9/encoder/x86/vp9_dct32x32_sse2_impl.h" // NOLINT
#undef FDCT32x32_2D
#undef FDCT32x32_HIGH_PRECISION
#undef DCT_HIGH_BIT_DEPTH
#if CONFIG_VP9_HIGHBITDEPTH
#define DCT_HIGH_BIT_DEPTH 1
#define FDCT32x32_2D vp9_highbd_fdct32x32_rd_sse2
#define FDCT32x32_HIGH_PRECISION 0
#include "vp9/encoder/x86/vp9_dct32x32_sse2_impl.h" // NOLINT
#undef FDCT32x32_2D
#undef FDCT32x32_HIGH_PRECISION
#define FDCT32x32_2D vp9_highbd_fdct32x32_sse2
#define FDCT32x32_HIGH_PRECISION 1
#include "vp9/encoder/x86/vp9_dct32x32_sse2_impl.h" // NOLINT
#undef FDCT32x32_2D
#undef FDCT32x32_HIGH_PRECISION
#undef DCT_HIGH_BIT_DEPTH
#endif // CONFIG_VP9_HIGHBITDEPTH
......@@ -118,14 +118,11 @@ VP9_CX_SRCS-$(ARCH_X86_64) += encoder/x86/vp9_ssim_opt_x86_64.asm
VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_dct_sse2.c
VP9_CX_SRCS-$(HAVE_SSSE3) += encoder/x86/vp9_dct_ssse3.c
VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_dct32x32_sse2_impl.h
ifeq ($(CONFIG_VP9_TEMPORAL_DENOISING),yes)
VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_denoiser_sse2.c
endif
VP9_CX_SRCS-$(HAVE_AVX2) += encoder/x86/vp9_dct32x32_avx2_impl.h
VP9_CX_SRCS-$(HAVE_AVX2) += encoder/x86/vp9_dct_avx2.c
VP9_CX_SRCS-$(HAVE_AVX2) += encoder/x86/vp9_error_intrin_avx2.c
ifneq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
......
This diff is collapsed.
......@@ -8,6 +8,9 @@
* be found in the AUTHORS file in the root of the source tree.
*/
#ifndef VPX_DSP_FWD_TXFM_H_
#define VPX_DSP_FWD_TXFM_H_
#include "vpx_dsp/txfm_common.h"
static INLINE tran_high_t fdct_round_shift(tran_high_t input) {
......@@ -17,3 +20,6 @@ static INLINE tran_high_t fdct_round_shift(tran_high_t input) {
// assert(INT16_MIN <= rv && rv <= INT16_MAX);
return rv;
}
void vp9_fdct32(const tran_high_t *input, tran_high_t *output, int round);
#endif // VPX_DSP_FWD_TXFM_H_
This diff is collapsed.
......@@ -273,6 +273,85 @@
out3 = DOT_SHIFT_RIGHT_PCK_H(vec0_m, vec1_m, cnst0_m); \
}
#define FDCT_POSTPROC_2V_NEG_H(vec0, vec1) { \
v8i16 tp0_m, tp1_m; \
v8i16 one_m = __msa_ldi_h(1); \
\
tp0_m = __msa_clti_s_h(vec0, 0); \
tp1_m = __msa_clti_s_h(vec1, 0); \
vec0 += 1; \
vec1 += 1; \
tp0_m = one_m & tp0_m; \
tp1_m = one_m & tp1_m; \
vec0 += tp0_m; \
vec1 += tp1_m; \
vec0 >>= 2; \
vec1 >>= 2; \
}
#define FDCT32_POSTPROC_NEG_W(vec) { \
v4i32 temp_m; \
v4i32 one_m = __msa_ldi_w(1); \
\
temp_m = __msa_clti_s_w(vec, 0); \
vec += 1; \
temp_m = one_m & temp_m; \
vec += temp_m; \
vec >>= 2; \
}
#define FDCT32_POSTPROC_2V_POS_H(vec0, vec1) { \
v8i16 tp0_m, tp1_m; \
v8i16 one = __msa_ldi_h(1); \
\
tp0_m = __msa_clei_s_h(vec0, 0); \
tp1_m = __msa_clei_s_h(vec1, 0); \
tp0_m = (v8i16)__msa_xori_b((v16u8)tp0_m, 255); \
tp1_m = (v8i16)__msa_xori_b((v16u8)tp1_m, 255); \
vec0 += 1; \
vec1 += 1; \
tp0_m = one & tp0_m; \
tp1_m = one & tp1_m; \
vec0 += tp0_m; \
vec1 += tp1_m; \
vec0 >>= 2; \
vec1 >>= 2; \
}
#define DOTP_CONST_PAIR_W(reg0_left, reg1_left, reg0_right, \
reg1_right, const0, const1, \
out0, out1, out2, out3) { \
v4i32 s0_m, s1_m, s2_m, s3_m, s4_m, s5_m, s6_m, s7_m; \
v2i64 tp0_m, tp1_m, tp2_m, tp3_m; \
v4i32 k0_m = __msa_fill_w((int32_t) const0); \
\
s0_m = __msa_fill_w((int32_t) const1); \
k0_m = __msa_ilvev_w(s0_m, k0_m); \
\
ILVRL_W2_SW(-reg1_left, reg0_left, s1_m, s0_m); \
ILVRL_W2_SW(reg0_left, reg1_left, s3_m, s2_m); \
ILVRL_W2_SW(-reg1_right, reg0_right, s5_m, s4_m); \
ILVRL_W2_SW(reg0_right, reg1_right, s7_m, s6_m); \
\
DOTP_SW2_SD(s0_m, s1_m, k0_m, k0_m, tp0_m, tp1_m); \
DOTP_SW2_SD(s4_m, s5_m, k0_m, k0_m, tp2_m, tp3_m); \
tp0_m = __msa_srari_d(tp0_m, DCT_CONST_BITS); \
tp1_m = __msa_srari_d(tp1_m, DCT_CONST_BITS); \
tp2_m = __msa_srari_d(tp2_m, DCT_CONST_BITS); \
tp3_m = __msa_srari_d(tp3_m, DCT_CONST_BITS); \
out0 = __msa_pckev_w((v4i32)tp0_m, (v4i32)tp1_m); \
out1 = __msa_pckev_w((v4i32)tp2_m, (v4i32)tp3_m); \
\
DOTP_SW2_SD(s2_m, s3_m, k0_m, k0_m, tp0_m, tp1_m); \
DOTP_SW2_SD(s6_m, s7_m, k0_m, k0_m, tp2_m, tp3_m); \
tp0_m = __msa_srari_d(tp0_m, DCT_CONST_BITS); \
tp1_m = __msa_srari_d(tp1_m, DCT_CONST_BITS); \
tp2_m = __msa_srari_d(tp2_m, DCT_CONST_BITS); \
tp3_m = __msa_srari_d(tp3_m, DCT_CONST_BITS); \
out2 = __msa_pckev_w((v4i32)tp0_m, (v4i32)tp1_m); \
out3 = __msa_pckev_w((v4i32)tp2_m, (v4i32)tp3_m); \
}
void fdct8x16_1d_column(const int16_t *input, int16_t *tmp_ptr,
int32_t src_stride);
void fdct16x8_1d_row(int16_t *input, int16_t *output);
......
......@@ -71,14 +71,18 @@ DSP_SRCS-yes += fwd_txfm.h
DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_sse2.h
DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_sse2.c
DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_impl_sse2.h
DSP_SRCS-$(HAVE_SSE2) += x86/fwd_dct32x32_impl_sse2.h
ifeq ($(ARCH_X86_64),yes)
ifeq ($(CONFIG_USE_X86INC),yes)
DSP_SRCS-$(HAVE_SSSE3) += x86/fwd_txfm_ssse3_x86_64.asm
endif
endif
DSP_SRCS-$(HAVE_AVX2) += x86/fwd_txfm_avx2.c
DSP_SRCS-$(HAVE_AVX2) += x86/fwd_dct32x32_impl_avx2.h
DSP_SRCS-$(HAVE_NEON) += arm/fwd_txfm_neon.c
DSP_SRCS-$(HAVE_MSA) += mips/fwd_txfm_msa.h
DSP_SRCS-$(HAVE_MSA) += mips/fwd_txfm_msa.c
DSP_SRCS-$(HAVE_MSA) += mips/fwd_dct32x32_msa.c
endif # CONFIG_VP9_ENCODER
# quantization
......
......@@ -138,6 +138,12 @@ if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") {
add_proto qw/void vp9_fdct16x16/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct16x16 sse2/;
add_proto qw/void vp9_fdct32x32/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct32x32 sse2/;
add_proto qw/void vp9_fdct32x32_rd/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct32x32_rd sse2/;
add_proto qw/void vp9_highbd_fdct4x4/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_highbd_fdct4x4 sse2/;
......@@ -146,6 +152,12 @@ if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") {
add_proto qw/void vp9_highbd_fdct16x16/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_highbd_fdct16x16 sse2/;
add_proto qw/void vp9_highbd_fdct32x32/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_highbd_fdct32x32 sse2/;
add_proto qw/void vp9_highbd_fdct32x32_rd/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_highbd_fdct32x32_rd sse2/;
} else {
add_proto qw/void vp9_fdct4x4/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct4x4 sse2 msa/;
......@@ -155,6 +167,12 @@ if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") {
add_proto qw/void vp9_fdct16x16/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct16x16 sse2 msa/;
add_proto qw/void vp9_fdct32x32/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct32x32 sse2 avx2 msa/;
add_proto qw/void vp9_fdct32x32_rd/, "const int16_t *input, tran_low_t *output, int stride";
specialize qw/vp9_fdct32x32_rd sse2 avx2 msa/;
} # CONFIG_VP9_HIGHBITDEPTH
} # CONFIG_VP9_ENCODER
......
......@@ -10,9 +10,7 @@
#include <immintrin.h> // AVX2
#include "./vp9_rtcd.h"
#include "vpx_dsp/txfm_common.h"
#include "vpx_ports/mem.h"
#define pair256_set_epi16(a, b) \
_mm256_set_epi16((int16_t)(b), (int16_t)(a), (int16_t)(b), (int16_t)(a), \
......
......@@ -10,11 +10,13 @@
#include <emmintrin.h> // SSE2
#include "vp9/encoder/vp9_dct.h"
#include "vpx_dsp/fwd_txfm.h"
#include "vpx_dsp/txfm_common.h"
#include "vpx_dsp/x86/txfm_common_sse2.h"
#include "vpx_ports/mem.h"
// TODO(jingning) The high bit-depth version needs re-work for performance.
// The current SSE2 implementation also causes cross reference to the static
// functions in the C implementation file.
#if DCT_HIGH_BIT_DEPTH
#define ADD_EPI16 _mm_adds_epi16
#define SUB_EPI16 _mm_subs_epi16
......
......@@ -8,19 +8,16 @@
* be found in the AUTHORS file in the root of the source tree.
*/
#include <immintrin.h> // AVX2
#include "vp9/common/vp9_idct.h" // for cospi constants
#include "vpx_ports/mem.h"
#include "./vpx_config.h"
#define FDCT32x32_2D_AVX2 vp9_fdct32x32_rd_avx2
#define FDCT32x32_HIGH_PRECISION 0
#include "vp9/encoder/x86/vp9_dct32x32_avx2_impl.h"
#include "vpx_dsp/x86/fwd_dct32x32_impl_avx2.h"
#undef FDCT32x32_2D_AVX2
#undef FDCT32x32_HIGH_PRECISION
#define FDCT32x32_2D_AVX2 vp9_fdct32x32_avx2
#define FDCT32x32_HIGH_PRECISION 1
#include "vp9/encoder/x86/vp9_dct32x32_avx2_impl.h" // NOLINT
#include "vpx_dsp/x86/fwd_dct32x32_impl_avx2.h" // NOLINT
#undef FDCT32x32_2D_AVX2
#undef FDCT32x32_HIGH_PRECISION
......@@ -11,7 +11,6 @@
#include "./vpx_config.h"
#define DCT_HIGH_BIT_DEPTH 0
#define FDCT4x4_2D vp9_fdct4x4_sse2
#define FDCT8x8_2D vp9_fdct8x8_sse2
#define FDCT16x16_2D vp9_fdct16x16_sse2
......@@ -19,6 +18,18 @@
#undef FDCT4x4_2D
#undef FDCT8x8_2D
#undef FDCT16x16_2D
#define FDCT32x32_2D vp9_fdct32x32_rd_sse2
#define FDCT32x32_HIGH_PRECISION 0
#include "vpx_dsp/x86/fwd_dct32x32_impl_sse2.h"
#undef FDCT32x32_2D
#undef FDCT32x32_HIGH_PRECISION
#define FDCT32x32_2D vp9_fdct32x32_sse2
#define FDCT32x32_HIGH_PRECISION 1
#include "vpx_dsp/x86/fwd_dct32x32_impl_sse2.h" // NOLINT
#undef FDCT32x32_2D
#undef FDCT32x32_HIGH_PRECISION
#undef DCT_HIGH_BIT_DEPTH
#if CONFIG_VP9_HIGHBITDEPTH
......@@ -30,5 +41,17 @@
#undef FDCT4x4_2D
#undef FDCT8x8_2D
#undef FDCT16x16_2D
#define FDCT32x32_2D vp9_highbd_fdct32x32_rd_sse2
#define FDCT32x32_HIGH_PRECISION 0
#include "vpx_dsp/x86/fwd_dct32x32_impl_sse2.h" // NOLINT
#undef FDCT32x32_2D
#undef FDCT32x32_HIGH_PRECISION
#define FDCT32x32_2D vp9_highbd_fdct32x32_sse2
#define FDCT32x32_HIGH_PRECISION 1
#include "vpx_dsp/x86/fwd_dct32x32_impl_sse2.h" // NOLINT
#undef FDCT32x32_2D
#undef FDCT32x32_HIGH_PRECISION
#undef DCT_HIGH_BIT_DEPTH
#endif // CONFIG_VP9_HIGHBITDEPTH
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