Commit d05f66aa authored by Jingning Han's avatar Jingning Han
Browse files

SSE2 16x16 inverse ADST/DCT hybrid transform

This commit enables SSE2 implementation of 16x16 inverse ADST/DCT
hybrid transform. The runtime goes from 5742 cycles -> 1821 cycles.
This provides about 1% encoding speed-up at speed 0.

Change-Id: I1678d0988bf30b9efd524877705bbb3645edb17b
parent c0562d08
......@@ -534,6 +534,7 @@ static void idct16_1d(int16_t *input, int16_t *output) {
step1[14] = -step2[14] + step2[15];
step1[15] = step2[14] + step2[15];
// stage 4
temp1 = (step1[0] + step1[1]) * cospi_16_64;
temp2 = (step1[0] - step1[1]) * cospi_16_64;
step2[0] = dct_const_round_shift(temp1);
......@@ -331,7 +331,7 @@ prototype void vp9_short_iht8x8_add "int16_t *input, uint8_t *dest, int dest_str
specialize vp9_short_iht8x8_add sse2
prototype void vp9_short_iht16x16_add "int16_t *input, uint8_t *output, int pitch, int tx_type"
specialize vp9_short_iht16x16_add
specialize vp9_short_iht16x16_add sse2
prototype void vp9_idct4_1d "int16_t *input, int16_t *output"
specialize vp9_idct4_1d sse2
This diff is collapsed.
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment