Commit d8b93f56 authored by Sebastien Alaiwan's avatar Sebastien Alaiwan

Remove abandonned CHROMA_2X2 experiment

Change-Id: I5bff0a68602a89ce480fec049c8b2c4bce44f6bb
parent 12546aa2
...@@ -285,67 +285,35 @@ void av1_fwd_txfm2d_64x32_c(const int16_t *input, int32_t *output, int stride, ...@@ -285,67 +285,35 @@ void av1_fwd_txfm2d_64x32_c(const int16_t *input, int32_t *output, int stride,
static const TXFM_1D_CFG *fwd_txfm_col_cfg_ls[TX_TYPES_1D][TX_SIZES] = { static const TXFM_1D_CFG *fwd_txfm_col_cfg_ls[TX_TYPES_1D][TX_SIZES] = {
// DCT // DCT
{ { &fwd_txfm_1d_col_cfg_dct_4, &fwd_txfm_1d_col_cfg_dct_8,
#if CONFIG_CHROMA_2X2 &fwd_txfm_1d_col_cfg_dct_16, &fwd_txfm_1d_col_cfg_dct_32 },
NULL,
#endif
&fwd_txfm_1d_col_cfg_dct_4, &fwd_txfm_1d_col_cfg_dct_8,
&fwd_txfm_1d_col_cfg_dct_16, &fwd_txfm_1d_col_cfg_dct_32 },
// ADST // ADST
{ { &fwd_txfm_1d_col_cfg_adst_4, &fwd_txfm_1d_col_cfg_adst_8,
#if CONFIG_CHROMA_2X2 &fwd_txfm_1d_col_cfg_adst_16, &fwd_txfm_1d_col_cfg_adst_32 },
NULL,
#endif
&fwd_txfm_1d_col_cfg_adst_4, &fwd_txfm_1d_col_cfg_adst_8,
&fwd_txfm_1d_col_cfg_adst_16, &fwd_txfm_1d_col_cfg_adst_32 },
#if CONFIG_EXT_TX #if CONFIG_EXT_TX
// FLIPADST // FLIPADST
{ { &fwd_txfm_1d_col_cfg_adst_4, &fwd_txfm_1d_col_cfg_adst_8,
#if CONFIG_CHROMA_2X2 &fwd_txfm_1d_col_cfg_adst_16, &fwd_txfm_1d_col_cfg_adst_32 },
NULL,
#endif
&fwd_txfm_1d_col_cfg_adst_4, &fwd_txfm_1d_col_cfg_adst_8,
&fwd_txfm_1d_col_cfg_adst_16, &fwd_txfm_1d_col_cfg_adst_32 },
// IDENTITY // IDENTITY
{ { &fwd_txfm_1d_cfg_identity_4, &fwd_txfm_1d_cfg_identity_8,
#if CONFIG_CHROMA_2X2 &fwd_txfm_1d_cfg_identity_16, &fwd_txfm_1d_cfg_identity_32 },
NULL,
#endif
&fwd_txfm_1d_cfg_identity_4, &fwd_txfm_1d_cfg_identity_8,
&fwd_txfm_1d_cfg_identity_16, &fwd_txfm_1d_cfg_identity_32 },
#endif // CONFIG_EXT_TX #endif // CONFIG_EXT_TX
}; };
static const TXFM_1D_CFG *fwd_txfm_row_cfg_ls[TX_TYPES_1D][TX_SIZES] = { static const TXFM_1D_CFG *fwd_txfm_row_cfg_ls[TX_TYPES_1D][TX_SIZES] = {
// DCT // DCT
{ { &fwd_txfm_1d_row_cfg_dct_4, &fwd_txfm_1d_row_cfg_dct_8,
#if CONFIG_CHROMA_2X2 &fwd_txfm_1d_row_cfg_dct_16, &fwd_txfm_1d_row_cfg_dct_32 },
NULL,
#endif
&fwd_txfm_1d_row_cfg_dct_4, &fwd_txfm_1d_row_cfg_dct_8,
&fwd_txfm_1d_row_cfg_dct_16, &fwd_txfm_1d_row_cfg_dct_32 },
// ADST // ADST
{ { &fwd_txfm_1d_row_cfg_adst_4, &fwd_txfm_1d_row_cfg_adst_8,
#if CONFIG_CHROMA_2X2 &fwd_txfm_1d_row_cfg_adst_16, &fwd_txfm_1d_row_cfg_adst_32 },
NULL,
#endif
&fwd_txfm_1d_row_cfg_adst_4, &fwd_txfm_1d_row_cfg_adst_8,
&fwd_txfm_1d_row_cfg_adst_16, &fwd_txfm_1d_row_cfg_adst_32 },
#if CONFIG_EXT_TX #if CONFIG_EXT_TX
// FLIPADST // FLIPADST
{ { &fwd_txfm_1d_row_cfg_adst_4, &fwd_txfm_1d_row_cfg_adst_8,
#if CONFIG_CHROMA_2X2 &fwd_txfm_1d_row_cfg_adst_16, &fwd_txfm_1d_row_cfg_adst_32 },
NULL,
#endif
&fwd_txfm_1d_row_cfg_adst_4, &fwd_txfm_1d_row_cfg_adst_8,
&fwd_txfm_1d_row_cfg_adst_16, &fwd_txfm_1d_row_cfg_adst_32 },
// IDENTITY // IDENTITY
{ { &fwd_txfm_1d_cfg_identity_4, &fwd_txfm_1d_cfg_identity_8,
#if CONFIG_CHROMA_2X2 &fwd_txfm_1d_cfg_identity_16, &fwd_txfm_1d_cfg_identity_32 },
NULL,
#endif
&fwd_txfm_1d_cfg_identity_4, &fwd_txfm_1d_cfg_identity_8,
&fwd_txfm_1d_cfg_identity_16, &fwd_txfm_1d_cfg_identity_32 },
#endif // CONFIG_EXT_TX #endif // CONFIG_EXT_TX
}; };
......
...@@ -14,19 +14,11 @@ ...@@ -14,19 +14,11 @@
#include "av1/common/av1_inv_txfm1d.h" #include "av1/common/av1_inv_txfm1d.h"
// sum of fwd_shift_## // sum of fwd_shift_##
#if CONFIG_CHROMA_2X2
#if CONFIG_TX64X64
static const int8_t fwd_shift_sum[TX_SIZES] = { 3, 2, 1, 0, -2, -4 };
#else // CONFIG_TX64X64
static const int8_t fwd_shift_sum[TX_SIZES] = { 3, 2, 1, 0, -2 };
#endif // CONFIG_TX64X64
#else // CONFIG_CHROMA_2X2
#if CONFIG_TX64X64 #if CONFIG_TX64X64
static const int8_t fwd_shift_sum[TX_SIZES] = { 2, 1, 0, -2, -4 }; static const int8_t fwd_shift_sum[TX_SIZES] = { 2, 1, 0, -2, -4 };
#else // CONFIG_TX64X64 #else // CONFIG_TX64X64
static const int8_t fwd_shift_sum[TX_SIZES] = { 2, 1, 0, -2 }; static const int8_t fwd_shift_sum[TX_SIZES] = { 2, 1, 0, -2 };
#endif // CONFIG_TX64X64 #endif // CONFIG_TX64X64
#endif // CONFIG_CHROMA_2X2
// ---------------- 4x4 1D config ----------------------- // ---------------- 4x4 1D config -----------------------
// shift // shift
......
...@@ -44,48 +44,32 @@ static INLINE TxfmFunc inv_txfm_type_to_func(TXFM_TYPE txfm_type) { ...@@ -44,48 +44,32 @@ static INLINE TxfmFunc inv_txfm_type_to_func(TXFM_TYPE txfm_type) {
static const TXFM_1D_CFG *inv_txfm_col_cfg_ls[TX_TYPES_1D][TX_SIZES] = { static const TXFM_1D_CFG *inv_txfm_col_cfg_ls[TX_TYPES_1D][TX_SIZES] = {
// DCT // DCT
{ { &inv_txfm_1d_col_cfg_dct_4, &inv_txfm_1d_col_cfg_dct_8,
#if CONFIG_CHROMA_2X2 &inv_txfm_1d_col_cfg_dct_16, &inv_txfm_1d_col_cfg_dct_32,
NULL,
#endif
&inv_txfm_1d_col_cfg_dct_4, &inv_txfm_1d_col_cfg_dct_8,
&inv_txfm_1d_col_cfg_dct_16, &inv_txfm_1d_col_cfg_dct_32,
#if CONFIG_TX64X64 #if CONFIG_TX64X64
&inv_txfm_1d_col_cfg_dct_64 &inv_txfm_1d_col_cfg_dct_64
#endif // CONFIG_TX64X64 #endif // CONFIG_TX64X64
}, },
// ADST // ADST
{ { &inv_txfm_1d_col_cfg_adst_4, &inv_txfm_1d_col_cfg_adst_8,
#if CONFIG_CHROMA_2X2 &inv_txfm_1d_col_cfg_adst_16, &inv_txfm_1d_col_cfg_adst_32,
NULL,
#endif
&inv_txfm_1d_col_cfg_adst_4, &inv_txfm_1d_col_cfg_adst_8,
&inv_txfm_1d_col_cfg_adst_16, &inv_txfm_1d_col_cfg_adst_32,
#if CONFIG_TX64X64 #if CONFIG_TX64X64
NULL NULL
#endif // CONFIG_TX64X64 #endif // CONFIG_TX64X64
}, },
#if CONFIG_EXT_TX #if CONFIG_EXT_TX
// FLIPADST // FLIPADST
{ { &inv_txfm_1d_col_cfg_adst_4, &inv_txfm_1d_col_cfg_adst_8,
#if CONFIG_CHROMA_2X2 &inv_txfm_1d_col_cfg_adst_16, &inv_txfm_1d_col_cfg_adst_32,
NULL,
#endif
&inv_txfm_1d_col_cfg_adst_4, &inv_txfm_1d_col_cfg_adst_8,
&inv_txfm_1d_col_cfg_adst_16, &inv_txfm_1d_col_cfg_adst_32,
#if CONFIG_TX64X64 #if CONFIG_TX64X64
NULL NULL
#endif // CONFIG_TX64X64 #endif // CONFIG_TX64X64
}, },
// IDENTITY // IDENTITY
{ { &inv_txfm_1d_cfg_identity_4, &inv_txfm_1d_cfg_identity_8,
#if CONFIG_CHROMA_2X2 &inv_txfm_1d_cfg_identity_16, &inv_txfm_1d_cfg_identity_32,
NULL,
#endif
&inv_txfm_1d_cfg_identity_4, &inv_txfm_1d_cfg_identity_8,
&inv_txfm_1d_cfg_identity_16, &inv_txfm_1d_cfg_identity_32,
#if CONFIG_TX64X64 #if CONFIG_TX64X64
&inv_txfm_1d_cfg_identity_64 &inv_txfm_1d_cfg_identity_64
#endif // CONFIG_TX64X64 #endif // CONFIG_TX64X64
}, },
#endif // CONFIG_EXT_TX #endif // CONFIG_EXT_TX
...@@ -94,9 +78,6 @@ static const TXFM_1D_CFG *inv_txfm_col_cfg_ls[TX_TYPES_1D][TX_SIZES] = { ...@@ -94,9 +78,6 @@ static const TXFM_1D_CFG *inv_txfm_col_cfg_ls[TX_TYPES_1D][TX_SIZES] = {
static const TXFM_1D_CFG *inv_txfm_row_cfg_ls[TX_TYPES_1D][TX_SIZES] = { static const TXFM_1D_CFG *inv_txfm_row_cfg_ls[TX_TYPES_1D][TX_SIZES] = {
// DCT // DCT
{ {
#if CONFIG_CHROMA_2X2
NULL,
#endif
&inv_txfm_1d_row_cfg_dct_4, &inv_txfm_1d_row_cfg_dct_8, &inv_txfm_1d_row_cfg_dct_4, &inv_txfm_1d_row_cfg_dct_8,
&inv_txfm_1d_row_cfg_dct_16, &inv_txfm_1d_row_cfg_dct_32, &inv_txfm_1d_row_cfg_dct_16, &inv_txfm_1d_row_cfg_dct_32,
#if CONFIG_TX64X64 #if CONFIG_TX64X64
...@@ -104,37 +85,25 @@ static const TXFM_1D_CFG *inv_txfm_row_cfg_ls[TX_TYPES_1D][TX_SIZES] = { ...@@ -104,37 +85,25 @@ static const TXFM_1D_CFG *inv_txfm_row_cfg_ls[TX_TYPES_1D][TX_SIZES] = {
#endif // CONFIG_TX64X64 #endif // CONFIG_TX64X64
}, },
// ADST // ADST
{ { &inv_txfm_1d_row_cfg_adst_4, &inv_txfm_1d_row_cfg_adst_8,
#if CONFIG_CHROMA_2X2 &inv_txfm_1d_row_cfg_adst_16, &inv_txfm_1d_row_cfg_adst_32,
NULL,
#endif
&inv_txfm_1d_row_cfg_adst_4, &inv_txfm_1d_row_cfg_adst_8,
&inv_txfm_1d_row_cfg_adst_16, &inv_txfm_1d_row_cfg_adst_32,
#if CONFIG_TX64X64 #if CONFIG_TX64X64
NULL NULL
#endif // CONFIG_TX64X64 #endif // CONFIG_TX64X64
}, },
#if CONFIG_EXT_TX #if CONFIG_EXT_TX
// FLIPADST // FLIPADST
{ { &inv_txfm_1d_row_cfg_adst_4, &inv_txfm_1d_row_cfg_adst_8,
#if CONFIG_CHROMA_2X2 &inv_txfm_1d_row_cfg_adst_16, &inv_txfm_1d_row_cfg_adst_32,
NULL,
#endif
&inv_txfm_1d_row_cfg_adst_4, &inv_txfm_1d_row_cfg_adst_8,
&inv_txfm_1d_row_cfg_adst_16, &inv_txfm_1d_row_cfg_adst_32,
#if CONFIG_TX64X64 #if CONFIG_TX64X64
NULL NULL
#endif // CONFIG_TX64X64 #endif // CONFIG_TX64X64
}, },
// IDENTITY // IDENTITY
{ { &inv_txfm_1d_cfg_identity_4, &inv_txfm_1d_cfg_identity_8,
#if CONFIG_CHROMA_2X2 &inv_txfm_1d_cfg_identity_16, &inv_txfm_1d_cfg_identity_32,
NULL,
#endif
&inv_txfm_1d_cfg_identity_4, &inv_txfm_1d_cfg_identity_8,
&inv_txfm_1d_cfg_identity_16, &inv_txfm_1d_cfg_identity_32,
#if CONFIG_TX64X64 #if CONFIG_TX64X64
&inv_txfm_1d_cfg_identity_64 &inv_txfm_1d_cfg_identity_64
#endif // CONFIG_TX64X64 #endif // CONFIG_TX64X64
}, },
#endif // CONFIG_EXT_TX #endif // CONFIG_EXT_TX
......
...@@ -333,9 +333,6 @@ extern void aom_highbd_lpf_vertical_6_c(uint16_t *s, int pitch, ...@@ -333,9 +333,6 @@ extern void aom_highbd_lpf_vertical_6_c(uint16_t *s, int pitch,
// //
// A loopfilter should be applied to every other 8x8 horizontally. // A loopfilter should be applied to every other 8x8 horizontally.
static const uint64_t left_64x64_txform_mask[TX_SIZES] = { static const uint64_t left_64x64_txform_mask[TX_SIZES] = {
#if CONFIG_CHROMA_2X2
0xffffffffffffffffULL, // TX_2X2
#endif
0xffffffffffffffffULL, // TX_4X4 0xffffffffffffffffULL, // TX_4X4
0xffffffffffffffffULL, // TX_8x8 0xffffffffffffffffULL, // TX_8x8
0x5555555555555555ULL, // TX_16x16 0x5555555555555555ULL, // TX_16x16
...@@ -363,9 +360,6 @@ static const uint64_t left_64x64_txform_mask[TX_SIZES] = { ...@@ -363,9 +360,6 @@ static const uint64_t left_64x64_txform_mask[TX_SIZES] = {
// //
// A loopfilter should be applied to every other 4 the row vertically. // A loopfilter should be applied to every other 4 the row vertically.
static const uint64_t above_64x64_txform_mask[TX_SIZES] = { static const uint64_t above_64x64_txform_mask[TX_SIZES] = {
#if CONFIG_CHROMA_2X2
0xffffffffffffffffULL, // TX_4X4
#endif
0xffffffffffffffffULL, // TX_4X4 0xffffffffffffffffULL, // TX_4X4
0xffffffffffffffffULL, // TX_8x8 0xffffffffffffffffULL, // TX_8x8
0x00ff00ff00ff00ffULL, // TX_16x16 0x00ff00ff00ff00ffULL, // TX_16x16
...@@ -391,7 +385,7 @@ static const uint64_t above_64x64_txform_mask[TX_SIZES] = { ...@@ -391,7 +385,7 @@ static const uint64_t above_64x64_txform_mask[TX_SIZES] = {
// 00000000 // 00000000
// 00000000 // 00000000
static const uint64_t left_prediction_mask[BLOCK_SIZES_ALL] = { static const uint64_t left_prediction_mask[BLOCK_SIZES_ALL] = {
#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #if CONFIG_CHROMA_SUB8X8
0x0000000000000001ULL, // BLOCK_2X2, 0x0000000000000001ULL, // BLOCK_2X2,
0x0000000000000001ULL, // BLOCK_2X4, 0x0000000000000001ULL, // BLOCK_2X4,
0x0000000000000001ULL, // BLOCK_4X2, 0x0000000000000001ULL, // BLOCK_4X2,
...@@ -419,7 +413,7 @@ static const uint64_t left_prediction_mask[BLOCK_SIZES_ALL] = { ...@@ -419,7 +413,7 @@ static const uint64_t left_prediction_mask[BLOCK_SIZES_ALL] = {
// 64 bit mask to shift and set for each prediction size. // 64 bit mask to shift and set for each prediction size.
static const uint64_t above_prediction_mask[BLOCK_SIZES_ALL] = { static const uint64_t above_prediction_mask[BLOCK_SIZES_ALL] = {
#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #if CONFIG_CHROMA_SUB8X8
0x0000000000000001ULL, // BLOCK_2X2 0x0000000000000001ULL, // BLOCK_2X2
0x0000000000000001ULL, // BLOCK_2X4 0x0000000000000001ULL, // BLOCK_2X4
0x0000000000000001ULL, // BLOCK_4X2 0x0000000000000001ULL, // BLOCK_4X2
...@@ -448,7 +442,7 @@ static const uint64_t above_prediction_mask[BLOCK_SIZES_ALL] = { ...@@ -448,7 +442,7 @@ static const uint64_t above_prediction_mask[BLOCK_SIZES_ALL] = {
// each 8x8 block that would be in the top left most block of the given block // each 8x8 block that would be in the top left most block of the given block
// size in the 64x64 block. // size in the 64x64 block.
static const uint64_t size_mask[BLOCK_SIZES_ALL] = { static const uint64_t size_mask[BLOCK_SIZES_ALL] = {
#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #if CONFIG_CHROMA_SUB8X8
0x0000000000000001ULL, // BLOCK_2X2 0x0000000000000001ULL, // BLOCK_2X2
0x0000000000000001ULL, // BLOCK_2X4 0x0000000000000001ULL, // BLOCK_2X4
0x0000000000000001ULL, // BLOCK_4X2 0x0000000000000001ULL, // BLOCK_4X2
...@@ -480,9 +474,6 @@ static const uint64_t above_border = 0x000000ff000000ffULL; ...@@ -480,9 +474,6 @@ static const uint64_t above_border = 0x000000ff000000ffULL;
// 16 bit masks for uv transform sizes. // 16 bit masks for uv transform sizes.
static const uint16_t left_64x64_txform_mask_uv[TX_SIZES] = { static const uint16_t left_64x64_txform_mask_uv[TX_SIZES] = {
#if CONFIG_CHROMA_2X2
0xffff, // TX_2X2
#endif
0xffff, // TX_4X4 0xffff, // TX_4X4
0xffff, // TX_8x8 0xffff, // TX_8x8
0x5555, // TX_16x16 0x5555, // TX_16x16
...@@ -493,9 +484,6 @@ static const uint16_t left_64x64_txform_mask_uv[TX_SIZES] = { ...@@ -493,9 +484,6 @@ static const uint16_t left_64x64_txform_mask_uv[TX_SIZES] = {
}; };
static const uint16_t above_64x64_txform_mask_uv[TX_SIZES] = { static const uint16_t above_64x64_txform_mask_uv[TX_SIZES] = {
#if CONFIG_CHROMA_2X2
0xffff, // TX_2X2
#endif
0xffff, // TX_4X4 0xffff, // TX_4X4
0xffff, // TX_8x8 0xffff, // TX_8x8
0x0f0f, // TX_16x16 0x0f0f, // TX_16x16
...@@ -507,7 +495,7 @@ static const uint16_t above_64x64_txform_mask_uv[TX_SIZES] = { ...@@ -507,7 +495,7 @@ static const uint16_t above_64x64_txform_mask_uv[TX_SIZES] = {
// 16 bit left mask to shift and set for each uv prediction size. // 16 bit left mask to shift and set for each uv prediction size.
static const uint16_t left_prediction_mask_uv[BLOCK_SIZES_ALL] = { static const uint16_t left_prediction_mask_uv[BLOCK_SIZES_ALL] = {
#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #if CONFIG_CHROMA_SUB8X8
0x0001, // BLOCK_2X2, 0x0001, // BLOCK_2X2,
0x0001, // BLOCK_2X4, 0x0001, // BLOCK_2X4,
0x0001, // BLOCK_4X2, 0x0001, // BLOCK_4X2,
...@@ -535,7 +523,7 @@ static const uint16_t left_prediction_mask_uv[BLOCK_SIZES_ALL] = { ...@@ -535,7 +523,7 @@ static const uint16_t left_prediction_mask_uv[BLOCK_SIZES_ALL] = {
// 16 bit above mask to shift and set for uv each prediction size. // 16 bit above mask to shift and set for uv each prediction size.
static const uint16_t above_prediction_mask_uv[BLOCK_SIZES_ALL] = { static const uint16_t above_prediction_mask_uv[BLOCK_SIZES_ALL] = {
#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #if CONFIG_CHROMA_SUB8X8
0x0001, // BLOCK_2X2 0x0001, // BLOCK_2X2
0x0001, // BLOCK_2X4 0x0001, // BLOCK_2X4
0x0001, // BLOCK_4X2 0x0001, // BLOCK_4X2
...@@ -563,7 +551,7 @@ static const uint16_t above_prediction_mask_uv[BLOCK_SIZES_ALL] = { ...@@ -563,7 +551,7 @@ static const uint16_t above_prediction_mask_uv[BLOCK_SIZES_ALL] = {
// 64 bit mask to shift and set for each uv prediction size // 64 bit mask to shift and set for each uv prediction size
static const uint16_t size_mask_uv[BLOCK_SIZES_ALL] = { static const uint16_t size_mask_uv[BLOCK_SIZES_ALL] = {
#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #if CONFIG_CHROMA_SUB8X8
0x0001, // BLOCK_2X2 0x0001, // BLOCK_2X2
0x0001, // BLOCK_2X4 0x0001, // BLOCK_2X4
0x0001, // BLOCK_4X2 0x0001, // BLOCK_4X2
...@@ -2157,7 +2145,7 @@ static void get_filter_level_and_masks_non420( ...@@ -2157,7 +2145,7 @@ static void get_filter_level_and_masks_non420(
(blk_row * mi_size_high[BLOCK_8X8] << TX_UNIT_HIGH_LOG2) >> 1; (blk_row * mi_size_high[BLOCK_8X8] << TX_UNIT_HIGH_LOG2) >> 1;
const int tx_col_idx = const int tx_col_idx =
(blk_col * mi_size_wide[BLOCK_8X8] << TX_UNIT_WIDE_LOG2) >> 1; (blk_col * mi_size_wide[BLOCK_8X8] << TX_UNIT_WIDE_LOG2) >> 1;
#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #if CONFIG_CHROMA_SUB8X8
const BLOCK_SIZE bsize = const BLOCK_SIZE bsize =
AOMMAX(BLOCK_4X4, get_plane_block_size(mbmi->sb_type, plane)); AOMMAX(BLOCK_4X4, get_plane_block_size(mbmi->sb_type, plane));
#else #else
...@@ -2662,11 +2650,11 @@ typedef enum EDGE_DIR { VERT_EDGE = 0, HORZ_EDGE = 1, NUM_EDGE_DIRS } EDGE_DIR; ...@@ -2662,11 +2650,11 @@ typedef enum EDGE_DIR { VERT_EDGE = 0, HORZ_EDGE = 1, NUM_EDGE_DIRS } EDGE_DIR;
static const uint32_t av1_prediction_masks[NUM_EDGE_DIRS][BLOCK_SIZES_ALL] = { static const uint32_t av1_prediction_masks[NUM_EDGE_DIRS][BLOCK_SIZES_ALL] = {
// mask for vertical edges filtering // mask for vertical edges filtering
{ {
#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #if CONFIG_CHROMA_SUB8X8
2 - 1, // BLOCK_2X2 2 - 1, // BLOCK_2X2
2 - 1, // BLOCK_2X4 2 - 1, // BLOCK_2X4
4 - 1, // BLOCK_4X2 4 - 1, // BLOCK_4X2
#endif // CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #endif // CONFIG_CHROMA_SUB8X8
4 - 1, // BLOCK_4X4 4 - 1, // BLOCK_4X4
4 - 1, // BLOCK_4X8 4 - 1, // BLOCK_4X8
8 - 1, // BLOCK_8X4 8 - 1, // BLOCK_8X4
...@@ -2698,11 +2686,11 @@ static const uint32_t av1_prediction_masks[NUM_EDGE_DIRS][BLOCK_SIZES_ALL] = { ...@@ -2698,11 +2686,11 @@ static const uint32_t av1_prediction_masks[NUM_EDGE_DIRS][BLOCK_SIZES_ALL] = {
}, },
// mask for horizontal edges filtering // mask for horizontal edges filtering
{ {
#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #if CONFIG_CHROMA_SUB8X8
2 - 1, // BLOCK_2X2 2 - 1, // BLOCK_2X2
4 - 1, // BLOCK_2X4 4 - 1, // BLOCK_2X4
2 - 1, // BLOCK_4X2 2 - 1, // BLOCK_4X2
#endif // CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #endif // CONFIG_CHROMA_SUB8X8
4 - 1, // BLOCK_4X4 4 - 1, // BLOCK_4X4
8 - 1, // BLOCK_4X8 8 - 1, // BLOCK_4X8
4 - 1, // BLOCK_8X4 4 - 1, // BLOCK_8X4
...@@ -2736,9 +2724,6 @@ static const uint32_t av1_prediction_masks[NUM_EDGE_DIRS][BLOCK_SIZES_ALL] = { ...@@ -2736,9 +2724,6 @@ static const uint32_t av1_prediction_masks[NUM_EDGE_DIRS][BLOCK_SIZES_ALL] = {
static const uint32_t av1_transform_masks[NUM_EDGE_DIRS][TX_SIZES_ALL] = { static const uint32_t av1_transform_masks[NUM_EDGE_DIRS][TX_SIZES_ALL] = {
{ {
#if CONFIG_CHROMA_2X2
2 - 1, // TX_2X2
#endif
4 - 1, // TX_4X4 4 - 1, // TX_4X4
8 - 1, // TX_8X8 8 - 1, // TX_8X8
16 - 1, // TX_16X16 16 - 1, // TX_16X16
...@@ -2762,9 +2747,6 @@ static const uint32_t av1_transform_masks[NUM_EDGE_DIRS][TX_SIZES_ALL] = { ...@@ -2762,9 +2747,6 @@ static const uint32_t av1_transform_masks[NUM_EDGE_DIRS][TX_SIZES_ALL] = {
32 - 1 // TX_32X8 32 - 1 // TX_32X8
}, },
{ {
#if CONFIG_CHROMA_2X2
2 - 1, // TX_2X2
#endif
4 - 1, // TX_4X4 4 - 1, // TX_4X4
8 - 1, // TX_8X8 8 - 1, // TX_8X8
16 - 1, // TX_16X16 16 - 1, // TX_16X16
...@@ -2821,7 +2803,7 @@ static TX_SIZE av1_get_transform_size(const MODE_INFO *const mi, ...@@ -2821,7 +2803,7 @@ static TX_SIZE av1_get_transform_size(const MODE_INFO *const mi,
const int tx_col_idx = const int tx_col_idx =
(blk_col * mi_size_wide[BLOCK_8X8] << TX_UNIT_WIDE_LOG2) >> 1; (blk_col * mi_size_wide[BLOCK_8X8] << TX_UNIT_WIDE_LOG2) >> 1;
#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #if CONFIG_CHROMA_SUB8X8
const BLOCK_SIZE bsize = const BLOCK_SIZE bsize =
AOMMAX(BLOCK_4X4, ss_size_lookup[sb_type][scale_horz][scale_vert]); AOMMAX(BLOCK_4X4, ss_size_lookup[sb_type][scale_horz][scale_vert]);
#else #else
......
...@@ -189,9 +189,6 @@ static INLINE void set_flip_cfg(TX_TYPE tx_type, TXFM_2D_FLIP_CFG *cfg) { ...@@ -189,9 +189,6 @@ static INLINE void set_flip_cfg(TX_TYPE tx_type, TXFM_2D_FLIP_CFG *cfg) {
#if CONFIG_TXMG #if CONFIG_TXMG
static INLINE TX_SIZE av1_rotate_tx_size(TX_SIZE tx_size) { static INLINE TX_SIZE av1_rotate_tx_size(TX_SIZE tx_size) {
switch (tx_size) { switch (tx_size) {
#if CONFIG_CHROMA_2X2
case TX_2X2: return TX_2X2;
#endif
case TX_4X4: return TX_4X4; case TX_4X4: return TX_4X4;
case TX_8X8: return TX_8X8; case TX_8X8: return TX_8X8;
case TX_16X16: return TX_16X16; case TX_16X16: return TX_16X16;
......
...@@ -35,7 +35,7 @@ ...@@ -35,7 +35,7 @@
extern "C" { extern "C" {
#endif #endif
#if (CONFIG_CHROMA_SUB8X8 || CONFIG_CHROMA_2X2) #if (CONFIG_CHROMA_SUB8X8)
#define SUB8X8_COMP_REF 0 #define SUB8X8_COMP_REF 0
#else #else
#define SUB8X8_COMP_REF 1 #define SUB8X8_COMP_REF 1
...@@ -1068,7 +1068,7 @@ static INLINE int is_lgt_allowed(PREDICTION_MODE mode, TX_SIZE tx_size) { ...@@ -1068,7 +1068,7 @@ static INLINE int is_lgt_allowed(PREDICTION_MODE mode, TX_SIZE tx_size) {
#if CONFIG_RECT_TX #if CONFIG_RECT_TX
static INLINE int is_rect_tx_allowed_bsize(BLOCK_SIZE bsize) { static INLINE int is_rect_tx_allowed_bsize(BLOCK_SIZE bsize) {
static const char LUT[BLOCK_SIZES_ALL] = { static const char LUT[BLOCK_SIZES_ALL] = {
#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #if CONFIG_CHROMA_SUB8X8
0, // BLOCK_2X2 0, // BLOCK_2X2
0, // BLOCK_2X4 0, // BLOCK_2X4
0, // BLOCK_4X2 0, // BLOCK_4X2
...@@ -1117,7 +1117,7 @@ static INLINE int is_rect_tx_allowed(const MACROBLOCKD *xd, ...@@ -1117,7 +1117,7 @@ static INLINE int is_rect_tx_allowed(const MACROBLOCKD *xd,
#if CONFIG_RECT_TX_EXT && (CONFIG_EXT_TX || CONFIG_VAR_TX) #if CONFIG_RECT_TX_EXT && (CONFIG_EXT_TX || CONFIG_VAR_TX)
static INLINE int is_quarter_tx_allowed_bsize(BLOCK_SIZE bsize) { static INLINE int is_quarter_tx_allowed_bsize(BLOCK_SIZE bsize) {
static const char LUT_QTTX[BLOCK_SIZES_ALL] = { static const char LUT_QTTX[BLOCK_SIZES_ALL] = {
#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8 #if CONFIG_CHROMA_SUB8X8
0, // BLOCK_2X2 0, // BLOCK_2X2
0, // BLOCK_2X4 0, // BLOCK_2X4
0, // BLOCK_4X2 0, // BLOCK_4X2
...@@ -1306,10 +1306,7 @@ static INLINE TX_TYPE av1_get_tx_type(PLANE_TYPE plane_type, ...@@ -1306,10 +1306,7 @@ static INLINE TX_TYPE av1_get_tx_type(PLANE_TYPE plane_type,
} }
if (is_inter_block(mbmi)) { if (is_inter_block(mbmi)) {
// UV Inter only // UV Inter only
#if CONFIG_CHROMA_2X2
if (tx_size < TX_4X4) return DCT_DCT;
#endif
return (mbmi->tx_type == IDTX && txsize_sqr_map[tx_size] >= TX_32X32) return (mbmi->tx_type == IDTX && txsize_sqr_map[tx_size] >= TX_32X32)
? DCT_DCT ? DCT_DCT
: mbmi->tx_type; : mbmi->tx_type;
...@@ -1318,12 +1315,7 @@ static INLINE TX_TYPE av1_get_tx_type(PLANE_TYPE plane_type, ...@@ -1318,12 +1315,7 @@ static INLINE TX_TYPE av1_get_tx_type(PLANE_TYPE plane_type,
#if CONFIG_CB4X4 #if CONFIG_CB4X4
(void)block; (void)block;
#if CONFIG_CHROMA_2X2 return intra_mode_to_tx_type_context[get_uv_mode(mbmi->uv_mode)];
if (tx_size < TX_4X4)
return DCT_DCT;
else
#endif // CONFIG_CHROMA_2X2
return intra_mode_to_tx_type_context[get_uv_mode(mbmi->uv_mode)];
#else // CONFIG_CB4X4 #else // CONFIG_CB4X4
// Sub8x8-Inter/Intra OR UV-Intra // Sub8x8-Inter/Intra OR UV-Intra
if (is_inter_block(mbmi)) { // Sub8x8-Inter if (is_inter_block(mbmi)) { // Sub8x8-Inter
...@@ -1366,10 +1358,6 @@ static INLINE TX_SIZE depth_to_tx_size(int depth) { ...@@ -1366,10 +1358,6 @@ static INLINE TX_SIZE depth_to_tx_size(int depth) {
static INLINE TX_SIZE av1_get_uv_tx_size(const MB_MODE_INFO *mbmi, static INLINE TX_SIZE av1_get_uv_tx_size(const MB_MODE_INFO *mbmi,
const struct macroblockd_plane *pd) { const struct macroblockd_plane *pd) {
#if CONFIG_CHROMA_2X2
assert(mbmi->tx_size > TX_2X2);
#endif // CONFIG_CHROMA_2X2
const TX_SIZE uv_txsize = const TX_SIZE uv_txsize =
uv_txsize_lookup[mbmi->sb_type][mbmi->tx_size][pd->subsampling_x] uv_txsize_lookup[mbmi->sb_type][mbmi->tx_size][pd->subsampling_x]
[pd->subsampling_y]; [pd->subsampling_y];
......
This diff is collapsed.
...@@ -138,9 +138,6 @@ const aom_prob av1_cat6_prob[] = { ...@@ -138,9 +138,6 @@ const aom_prob av1_cat6_prob[] = {
}; };
const uint16_t band_count_table[TX_SIZES_ALL][8] = { const uint16_t band_count_table[TX_SIZES_ALL][8] = {
#if CONFIG_CHROMA_2X2
{ 1, 2, 2, 3, 0, 0, 0 },
#endif
{ 1, 2, 3, 4, 3, 16 - 13, 0 }, { 1, 2, 3, 4, 11, 64 - 21, 0 }, { 1, 2, 3, 4, 3, 16 - 13, 0 }, { 1, 2, 3, 4, 11, 64 - 21, 0 },
{ 1, 2, 3, 4, 11, 256 - 21, 0 }, { 1, 2, 3, 4, 11, 1024 - 21, 0 }, { 1, 2, 3, 4, 11, 256 - 21, 0 }, { 1, 2, 3, 4, 11, 1024 - 21, 0 },
#if CONFIG_TX64X64 #if CONFIG_TX64X64
...@@ -157,9 +154,6 @@ const uint16_t band_count_table[TX_SIZES_ALL][8] = { ...@@ -157,9 +154,6 @@ const uint16_t band_count_table[TX_SIZES_ALL][8] = {
}; };
const uint16_t band_cum_count_table[TX_SIZES_ALL][8] = { const uint16_t band_cum_count_table[TX_SIZES_ALL][8] = {
#if CONFIG_CHROMA_2X2
{ 0, 1, 3, 6, 10, 13, 16, 0 },
#endif
{ 0, 1, 3, 6, 10, 13, 16, 0 }, { 0, 1, 3, 6, 10, 21, 64, 0 },