Commit eec47e65 authored by Sarah Parker's avatar Sarah Parker

Refactor hbd txfm configurations to be 1D

The hbd transform configurations were originally written for all possible
2d transforms. Now that there are many more possible 2d transforms
due to EXT_TX and RECT_TX, it is simpler to write the cfg for the
4 1D transform types and compose them to make all new possible transform
types. This will allow for an easier integration of the identity transform
for EXT_TX and rectangular transforms for RECT_TX into the current
hbd transform codepath and facilitate the removal of obsolete transforms.
This has no impact on performance.

BUG=aomedia:524

Change-Id: I1e217bcd217fd637b1df94fae62d9c59a0523c1a
parent bb6e1343
......@@ -16,11 +16,11 @@ set(AOM_AV1_COMMON_SOURCES
"${AOM_ROOT}/av1/common/av1_fwd_txfm1d.c"
"${AOM_ROOT}/av1/common/av1_fwd_txfm1d.h"
"${AOM_ROOT}/av1/common/av1_fwd_txfm2d.c"
"${AOM_ROOT}/av1/common/av1_fwd_txfm2d_cfg.h"
"${AOM_ROOT}/av1/common/av1_fwd_txfm1d_cfg.h"
"${AOM_ROOT}/av1/common/av1_inv_txfm1d.c"
"${AOM_ROOT}/av1/common/av1_inv_txfm1d.h"
"${AOM_ROOT}/av1/common/av1_inv_txfm2d.c"
"${AOM_ROOT}/av1/common/av1_inv_txfm2d_cfg.h"
"${AOM_ROOT}/av1/common/av1_inv_txfm1d_cfg.h"
"${AOM_ROOT}/av1/common/av1_loopfilter.c"
"${AOM_ROOT}/av1/common/av1_loopfilter.h"
"${AOM_ROOT}/av1/common/av1_txfm.h"
......
......@@ -69,9 +69,9 @@ AV1_COMMON_SRCS-yes += common/av1_fwd_txfm1d.c
AV1_COMMON_SRCS-yes += common/av1_inv_txfm1d.h
AV1_COMMON_SRCS-yes += common/av1_inv_txfm1d.c
AV1_COMMON_SRCS-yes += common/av1_fwd_txfm2d.c
AV1_COMMON_SRCS-yes += common/av1_fwd_txfm2d_cfg.h
AV1_COMMON_SRCS-yes += common/av1_fwd_txfm1d_cfg.h
AV1_COMMON_SRCS-yes += common/av1_inv_txfm2d.c
AV1_COMMON_SRCS-yes += common/av1_inv_txfm2d_cfg.h
AV1_COMMON_SRCS-yes += common/av1_inv_txfm1d_cfg.h
AV1_COMMON_SRCS-$(HAVE_SSSE3) += common/x86/av1_convolve_ssse3.c
ifeq ($(CONFIG_HIGHBITDEPTH),yes)
AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/av1_highbd_convolve_sse4.c
......
/*
* Copyright (c) 2016, Alliance for Open Media. All rights reserved
*
* This source code is subject to the terms of the BSD 2 Clause License and
* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
* was not distributed with this source code in the LICENSE file, you can
* obtain it at www.aomedia.org/license/software. If the Alliance for Open
* Media Patent License 1.0 was not distributed with this source code in the
* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
*/
#ifndef AV1_FWD_TXFM2D_CFG_H_
#define AV1_FWD_TXFM2D_CFG_H_
#include "av1/common/enums.h"
#include "av1/common/av1_fwd_txfm1d.h"
// ---------------- 4x4 1D constants -----------------------
// shift
static const int8_t fwd_shift_4[3] = { 2, 0, 0 };
// stage range
static const int8_t fwd_stage_range_col_dct_4[4] = { 15, 16, 17, 17 };
static const int8_t fwd_stage_range_row_dct_4[4] = { 17, 18, 18, 18 };
static const int8_t fwd_stage_range_col_adst_4[6] = { 15, 15, 16, 17, 17, 17 };
static const int8_t fwd_stage_range_row_adst_4[6] = { 17, 17, 17, 18, 18, 18 };
// cos bit
static const int8_t fwd_cos_bit_col_dct_4[4] = { 13, 13, 13, 13 };
static const int8_t fwd_cos_bit_row_dct_4[4] = { 13, 13, 13, 13 };
static const int8_t fwd_cos_bit_col_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
static const int8_t fwd_cos_bit_row_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
// ---------------- 8x8 1D constants -----------------------
// shift
static const int8_t fwd_shift_8[3] = { 2, -1, 0 };
// stage range
static const int8_t fwd_stage_range_col_dct_8[6] = { 15, 16, 17, 18, 18, 18 };
static const int8_t fwd_stage_range_row_dct_8[6] = { 17, 18, 19, 19, 19, 19 };
static const int8_t fwd_stage_range_col_adst_8[8] = { 15, 15, 16, 17,
17, 18, 18, 18 };
static const int8_t fwd_stage_range_row_adst_8[8] = { 17, 17, 17, 18,
18, 19, 19, 19 };
// cos bit
static const int8_t fwd_cos_bit_col_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
static const int8_t fwd_cos_bit_row_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
static const int8_t fwd_cos_bit_col_adst_8[8] = {
13, 13, 13, 13, 13, 13, 13, 13
};
static const int8_t fwd_cos_bit_row_adst_8[8] = {
13, 13, 13, 13, 13, 13, 13, 13
};
// ---------------- 16x16 1D constants -----------------------
// shift
static const int8_t fwd_shift_16[3] = { 2, -2, 0 };
// stage range
static const int8_t fwd_stage_range_col_dct_16[8] = { 15, 16, 17, 18,
19, 19, 19, 19 };
static const int8_t fwd_stage_range_row_dct_16[8] = { 17, 18, 19, 20,
20, 20, 20, 20 };
static const int8_t fwd_stage_range_col_adst_16[10] = { 15, 15, 16, 17, 17,
18, 18, 19, 19, 19 };
static const int8_t fwd_stage_range_row_adst_16[10] = { 17, 17, 17, 18, 18,
19, 19, 20, 20, 20 };
// cos bit
static const int8_t fwd_cos_bit_col_dct_16[8] = {
13, 13, 13, 13, 13, 13, 13, 13
};
static const int8_t fwd_cos_bit_row_dct_16[8] = {
12, 12, 12, 12, 12, 12, 12, 12
};
static const int8_t fwd_cos_bit_col_adst_16[10] = { 13, 13, 13, 13, 13,
13, 13, 13, 13, 13 };
static const int8_t fwd_cos_bit_row_adst_16[10] = { 12, 12, 12, 12, 12,
12, 12, 12, 12, 12 };
// ---------------- 32x32 1D constants -----------------------
// shift
static const int8_t fwd_shift_32[3] = { 2, -4, 0 };
// stage range
static const int8_t fwd_stage_range_col_dct_32[10] = { 15, 16, 17, 18, 19,
20, 20, 20, 20, 20 };
static const int8_t fwd_stage_range_row_dct_32[10] = { 16, 17, 18, 19, 20,
20, 20, 20, 20, 20 };
static const int8_t fwd_stage_range_col_adst_32[12] = {
15, 15, 16, 17, 17, 18, 18, 19, 19, 20, 20, 20
};
static const int8_t fwd_stage_range_row_adst_32[12] = {
16, 16, 16, 17, 17, 18, 18, 19, 19, 20, 20, 20
};
// cos bit
static const int8_t fwd_cos_bit_col_dct_32[10] = { 12, 12, 12, 12, 12,
12, 12, 12, 12, 12 };
static const int8_t fwd_cos_bit_row_dct_32[10] = { 12, 12, 12, 12, 12,
12, 12, 12, 12, 12 };
static const int8_t fwd_cos_bit_col_adst_32[12] = { 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12 };
static const int8_t fwd_cos_bit_row_adst_32[12] = { 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12 };
// ---------------- 64x64 1D constants -----------------------
// shift
static const int8_t fwd_shift_64[3] = { 0, -2, -2 };
// stage range
static const int8_t fwd_stage_range_col_dct_64[12] = { 13, 14, 15, 16, 17, 18,
19, 19, 19, 19, 19, 19 };
static const int8_t fwd_stage_range_row_dct_64[12] = { 17, 18, 19, 20, 21, 22,
22, 22, 22, 22, 22, 22 };
// cos bit
static const int8_t fwd_cos_bit_col_dct_64[12] = { 15, 15, 15, 15, 15, 14,
13, 13, 13, 13, 13, 13 };
static const int8_t fwd_cos_bit_row_dct_64[12] = { 15, 14, 13, 12, 11, 10,
10, 10, 10, 10, 10, 10 };
// ---------------- row config fwd_dct_4 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_row_cfg_dct_4 = {
4, // .txfm_size
4, // .stage_num
// 0, // .log_scale
fwd_shift_4, // .shift
fwd_stage_range_row_dct_4, // .stage_range
fwd_cos_bit_row_dct_4, // .cos_bit
TXFM_TYPE_DCT4 // .txfm_type
};
// ---------------- row config fwd_dct_8 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_row_cfg_dct_8 = {
8, // .txfm_size
6, // .stage_num
// 0, // .log_scale
fwd_shift_8, // .shift
fwd_stage_range_row_dct_8, // .stage_range
fwd_cos_bit_row_dct_8, // .cos_bit_
TXFM_TYPE_DCT8 // .txfm_type
};
// ---------------- row config fwd_dct_16 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_row_cfg_dct_16 = {
16, // .txfm_size
8, // .stage_num
// 0, // .log_scale
fwd_shift_16, // .shift
fwd_stage_range_row_dct_16, // .stage_range
fwd_cos_bit_row_dct_16, // .cos_bit
TXFM_TYPE_DCT16 // .txfm_type
};
// ---------------- row config fwd_dct_32 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_row_cfg_dct_32 = {
32, // .txfm_size
10, // .stage_num
// 1, // .log_scale
fwd_shift_32, // .shift
fwd_stage_range_row_dct_32, // .stage_range
fwd_cos_bit_row_dct_32, // .cos_bit_row
TXFM_TYPE_DCT32 // .txfm_type
};
// ---------------- row config fwd_dct_64 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_row_cfg_dct_64 = {
64, // .txfm_size
12, // .stage_num
fwd_shift_64, // .shift
fwd_stage_range_row_dct_64, // .stage_range
fwd_cos_bit_row_dct_64, // .cos_bit
TXFM_TYPE_DCT64, // .txfm_type_col
};
// ---------------- row config fwd_adst_4 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_row_cfg_adst_4 = {
4, // .txfm_size
6, // .stage_num
// 0, // .log_scale
fwd_shift_4, // .shift
fwd_stage_range_row_adst_4, // .stage_range
fwd_cos_bit_row_adst_4, // .cos_bit
TXFM_TYPE_ADST4, // .txfm_type
};
// ---------------- row config fwd_adst_8 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_row_cfg_adst_8 = {
8, // .txfm_size
8, // .stage_num
// 0, // .log_scale
fwd_shift_8, // .shift
fwd_stage_range_row_adst_8, // .stage_range
fwd_cos_bit_row_adst_8, // .cos_bit
TXFM_TYPE_ADST8, // .txfm_type_col
};
// ---------------- row config fwd_adst_16 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_row_cfg_adst_16 = {
16, // .txfm_size
10, // .stage_num
// 0, // .log_scale
fwd_shift_16, // .shift
fwd_stage_range_row_adst_16, // .stage_range
fwd_cos_bit_row_adst_16, // .cos_bit
TXFM_TYPE_ADST16, // .txfm_type
};
// ---------------- row config fwd_adst_32 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_row_cfg_adst_32 = {
32, // .txfm_size
12, // .stage_num
// 1, // .log_scale
fwd_shift_32, // .shift
fwd_stage_range_row_adst_32, // .stage_range
fwd_cos_bit_row_adst_32, // .cos_bit
TXFM_TYPE_ADST32, // .txfm_type
};
// ---------------- col config fwd_dct_4 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_col_cfg_dct_4 = {
4, // .txfm_size
4, // .stage_num
// 0, // .log_scale
fwd_shift_4, // .shift
fwd_stage_range_col_dct_4, // .stage_range
fwd_cos_bit_col_dct_4, // .cos_bit
TXFM_TYPE_DCT4 // .txfm_type
};
// ---------------- col config fwd_dct_8 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_col_cfg_dct_8 = {
8, // .txfm_size
6, // .stage_num
// 0, // .log_scale
fwd_shift_8, // .shift
fwd_stage_range_col_dct_8, // .stage_range
fwd_cos_bit_col_dct_8, // .cos_bit_
TXFM_TYPE_DCT8 // .txfm_type
};
// ---------------- col config fwd_dct_16 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_col_cfg_dct_16 = {
16, // .txfm_size
8, // .stage_num
// 0, // .log_scale
fwd_shift_16, // .shift
fwd_stage_range_col_dct_16, // .stage_range
fwd_cos_bit_col_dct_16, // .cos_bit
TXFM_TYPE_DCT16 // .txfm_type
};
// ---------------- col config fwd_dct_32 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_col_cfg_dct_32 = {
32, // .txfm_size
10, // .stage_num
// 1, // .log_scale
fwd_shift_32, // .shift
fwd_stage_range_col_dct_32, // .stage_range
fwd_cos_bit_col_dct_32, // .cos_bit_col
TXFM_TYPE_DCT32 // .txfm_type
};
// ---------------- col config fwd_dct_64 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_col_cfg_dct_64 = {
64, // .txfm_size
12, // .stage_num
fwd_shift_64, // .shift
fwd_stage_range_col_dct_64, // .stage_range
fwd_cos_bit_col_dct_64, // .cos_bit
TXFM_TYPE_DCT64, // .txfm_type_col
};
// ---------------- col config fwd_adst_4 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_col_cfg_adst_4 = {
4, // .txfm_size
6, // .stage_num
// 0, // .log_scale
fwd_shift_4, // .shift
fwd_stage_range_col_adst_4, // .stage_range
fwd_cos_bit_col_adst_4, // .cos_bit
TXFM_TYPE_ADST4, // .txfm_type
};
// ---------------- col config fwd_adst_8 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_col_cfg_adst_8 = {
8, // .txfm_size
8, // .stage_num
// 0, // .log_scale
fwd_shift_8, // .shift
fwd_stage_range_col_adst_8, // .stage_range
fwd_cos_bit_col_adst_8, // .cos_bit
TXFM_TYPE_ADST8, // .txfm_type_col
};
// ---------------- col config fwd_adst_16 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_col_cfg_adst_16 = {
16, // .txfm_size
10, // .stage_num
// 0, // .log_scale
fwd_shift_16, // .shift
fwd_stage_range_col_adst_16, // .stage_range
fwd_cos_bit_col_adst_16, // .cos_bit
TXFM_TYPE_ADST16, // .txfm_type
};
// ---------------- col config fwd_adst_32 ----------------
static const TXFM_1D_CFG fwd_txfm_1d_col_cfg_adst_32 = {
32, // .txfm_size
12, // .stage_num
// 1, // .log_scale
fwd_shift_32, // .shift
fwd_stage_range_col_adst_32, // .stage_range
fwd_cos_bit_col_adst_32, // .cos_bit
TXFM_TYPE_ADST32, // .txfm_type
};
#endif // AV1_FWD_TXFM2D_CFG_H_
......@@ -14,7 +14,7 @@
#include "./av1_rtcd.h"
#include "av1/common/enums.h"
#include "av1/common/av1_fwd_txfm1d.h"
#include "av1/common/av1_fwd_txfm2d_cfg.h"
#include "av1/common/av1_fwd_txfm1d_cfg.h"
#include "av1/common/av1_txfm.h"
static INLINE TxfmFunc fwd_txfm_type_to_func(TXFM_TYPE txfm_type) {
......@@ -35,14 +35,15 @@ static INLINE void fwd_txfm2d_c(const int16_t *input, int32_t *output,
const int stride, const TXFM_2D_FLIP_CFG *cfg,
int32_t *buf) {
int c, r;
const int txfm_size = cfg->cfg->txfm_size;
const int8_t *shift = cfg->cfg->shift;
const int8_t *stage_range_col = cfg->cfg->stage_range_col;
const int8_t *stage_range_row = cfg->cfg->stage_range_row;
const int8_t *cos_bit_col = cfg->cfg->cos_bit_col;
const int8_t *cos_bit_row = cfg->cfg->cos_bit_row;
const TxfmFunc txfm_func_col = fwd_txfm_type_to_func(cfg->cfg->txfm_type_col);
const TxfmFunc txfm_func_row = fwd_txfm_type_to_func(cfg->cfg->txfm_type_row);
// TODO(sarahparker) must correct for rectangular transforms in follow up
const int txfm_size = cfg->row_cfg->txfm_size;
const int8_t *shift = cfg->row_cfg->shift;
const int8_t *stage_range_col = cfg->col_cfg->stage_range;
const int8_t *stage_range_row = cfg->row_cfg->stage_range;
const int8_t *cos_bit_col = cfg->col_cfg->cos_bit;
const int8_t *cos_bit_row = cfg->row_cfg->cos_bit;
const TxfmFunc txfm_func_col = fwd_txfm_type_to_func(cfg->col_cfg->txfm_type);
const TxfmFunc txfm_func_row = fwd_txfm_type_to_func(cfg->row_cfg->txfm_type);
// use output buffer as temp buffer
int32_t *temp_in = output;
......@@ -117,69 +118,79 @@ void av1_fwd_txfm2d_64x64_c(const int16_t *input, int32_t *output, int stride,
fwd_txfm2d_c(input, output, stride, &cfg, txfm_buf);
}
static const TXFM_2D_CFG *fwd_txfm_cfg_ls[TX_TYPES][TX_SIZES] = {
static const TXFM_1D_CFG *fwd_txfm_col_cfg_ls[TX_TYPES_1D][TX_SIZES] = {
// DCT
{
#if CONFIG_CB4X4
NULL,
#endif
&fwd_txfm_2d_cfg_dct_dct_4, &fwd_txfm_2d_cfg_dct_dct_8,
&fwd_txfm_2d_cfg_dct_dct_16, &fwd_txfm_2d_cfg_dct_dct_32 },
&fwd_txfm_1d_col_cfg_dct_4, &fwd_txfm_1d_col_cfg_dct_8,
&fwd_txfm_1d_col_cfg_dct_16, &fwd_txfm_1d_col_cfg_dct_32 },
// ADST
{
#if CONFIG_CB4X4
NULL,
#endif
&fwd_txfm_2d_cfg_adst_dct_4, &fwd_txfm_2d_cfg_adst_dct_8,
&fwd_txfm_2d_cfg_adst_dct_16, &fwd_txfm_2d_cfg_adst_dct_32 },
{
#if CONFIG_CB4X4
NULL,
#endif
&fwd_txfm_2d_cfg_dct_adst_4, &fwd_txfm_2d_cfg_dct_adst_8,
&fwd_txfm_2d_cfg_dct_adst_16, &fwd_txfm_2d_cfg_dct_adst_32 },
&fwd_txfm_1d_col_cfg_adst_4, &fwd_txfm_1d_col_cfg_adst_8,
&fwd_txfm_1d_col_cfg_adst_16, &fwd_txfm_1d_col_cfg_adst_32 },
#if CONFIG_EXT_TX
// FLIPADST
{
#if CONFIG_CB4X4
NULL,
#endif
&fwd_txfm_2d_cfg_adst_adst_4, &fwd_txfm_2d_cfg_adst_adst_8,
&fwd_txfm_2d_cfg_adst_adst_16, &fwd_txfm_2d_cfg_adst_adst_32 },
#if CONFIG_EXT_TX
&fwd_txfm_1d_col_cfg_adst_4, &fwd_txfm_1d_col_cfg_adst_8,
&fwd_txfm_1d_col_cfg_adst_16, &fwd_txfm_1d_col_cfg_adst_32 },
// IDENTITY PLACEHOLDER
{
#if CONFIG_CB4X4
NULL,
#endif
&fwd_txfm_2d_cfg_adst_dct_4, &fwd_txfm_2d_cfg_adst_dct_8,
&fwd_txfm_2d_cfg_adst_dct_16, &fwd_txfm_2d_cfg_adst_dct_32 },
&fwd_txfm_1d_col_cfg_adst_4, &fwd_txfm_1d_col_cfg_adst_8,
&fwd_txfm_1d_col_cfg_adst_16, &fwd_txfm_1d_col_cfg_adst_32 },
#endif // CONFIG_EXT_TX
};
static const TXFM_1D_CFG *fwd_txfm_row_cfg_ls[TX_TYPES_1D][TX_SIZES] = {
// DCT
{
#if CONFIG_CB4X4
NULL,
#endif
&fwd_txfm_2d_cfg_dct_adst_4, &fwd_txfm_2d_cfg_dct_adst_8,
&fwd_txfm_2d_cfg_dct_adst_16, &fwd_txfm_2d_cfg_dct_adst_32 },
&fwd_txfm_1d_row_cfg_dct_4, &fwd_txfm_1d_row_cfg_dct_8,
&fwd_txfm_1d_row_cfg_dct_16, &fwd_txfm_1d_row_cfg_dct_32 },
// ADST
{
#if CONFIG_CB4X4
NULL,
#endif
&fwd_txfm_2d_cfg_adst_adst_4, &fwd_txfm_2d_cfg_adst_adst_8,
&fwd_txfm_2d_cfg_adst_adst_16, &fwd_txfm_2d_cfg_adst_adst_32 },
&fwd_txfm_1d_row_cfg_adst_4, &fwd_txfm_1d_row_cfg_adst_8,
&fwd_txfm_1d_row_cfg_adst_16, &fwd_txfm_1d_row_cfg_adst_32 },
#if CONFIG_EXT_TX
// FLIPADST
{
#if CONFIG_CB4X4
NULL,
#endif
&fwd_txfm_2d_cfg_adst_adst_4, &fwd_txfm_2d_cfg_adst_adst_8,
&fwd_txfm_2d_cfg_adst_adst_16, &fwd_txfm_2d_cfg_adst_adst_32 },
&fwd_txfm_1d_row_cfg_adst_4, &fwd_txfm_1d_row_cfg_adst_8,
&fwd_txfm_1d_row_cfg_adst_16, &fwd_txfm_1d_row_cfg_adst_32 },
// IDENTITY PLACEHOLDER
{
#if CONFIG_CB4X4
NULL,
#endif
&fwd_txfm_2d_cfg_adst_adst_4, &fwd_txfm_2d_cfg_adst_adst_8,
&fwd_txfm_2d_cfg_adst_adst_16, &fwd_txfm_2d_cfg_adst_adst_32 },
&fwd_txfm_1d_row_cfg_adst_4, &fwd_txfm_1d_row_cfg_adst_8,
&fwd_txfm_1d_row_cfg_adst_16, &fwd_txfm_1d_row_cfg_adst_32 },
#endif // CONFIG_EXT_TX
};
TXFM_2D_FLIP_CFG av1_get_fwd_txfm_cfg(int tx_type, int tx_size) {
TXFM_2D_FLIP_CFG cfg;
set_flip_cfg(tx_type, &cfg);
cfg.cfg = fwd_txfm_cfg_ls[tx_type][tx_size];
int tx_type_col = vtx_tab[tx_type];
int tx_type_row = htx_tab[tx_type];
cfg.col_cfg = fwd_txfm_col_cfg_ls[tx_type_col][tx_size];
cfg.row_cfg = fwd_txfm_row_cfg_ls[tx_type_row][tx_size];
return cfg;
}
......@@ -187,13 +198,11 @@ TXFM_2D_FLIP_CFG av1_get_fwd_txfm_64x64_cfg(int tx_type) {
TXFM_2D_FLIP_CFG cfg;
switch (tx_type) {
case DCT_DCT:
cfg.cfg = &fwd_txfm_2d_cfg_dct_dct_64;
cfg.col_cfg = &fwd_txfm_1d_col_cfg_dct_64;
cfg.row_cfg = &fwd_txfm_1d_row_cfg_dct_64;
cfg.ud_flip = 0;
cfg.lr_flip = 0;
break;
case ADST_DCT:
case DCT_ADST:
case ADST_ADST:
default:
cfg.ud_flip = 0;
cfg.lr_flip = 0;
......
/*
* Copyright (c) 2016, Alliance for Open Media. All rights reserved
*
* This source code is subject to the terms of the BSD 2 Clause License and
* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
* was not distributed with this source code in the LICENSE file, you can
* obtain it at www.aomedia.org/license/software. If the Alliance for Open
* Media Patent License 1.0 was not distributed with this source code in the
* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
*/
#ifndef AV1_FWD_TXFM2D_CFG_H_
#define AV1_FWD_TXFM2D_CFG_H_
#include "av1/common/enums.h"
#include "av1/common/av1_fwd_txfm1d.h"
// ---------------- config fwd_dct_dct_4 ----------------
static const int8_t fwd_shift_dct_dct_4[3] = { 2, 0, 0 };
static const int8_t fwd_stage_range_col_dct_dct_4[4] = { 15, 16, 17, 17 };
static const int8_t fwd_stage_range_row_dct_dct_4[4] = { 17, 18, 18, 18 };
static const int8_t fwd_cos_bit_col_dct_dct_4[4] = { 13, 13, 13, 13 };
static const int8_t fwd_cos_bit_row_dct_dct_4[4] = { 13, 13, 13, 13 };
static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_4 = {
4, // .txfm_size
4, // .stage_num_col
4, // .stage_num_row
// 0, // .log_scale
fwd_shift_dct_dct_4, // .shift
fwd_stage_range_col_dct_dct_4, // .stage_range_col
fwd_stage_range_row_dct_dct_4, // .stage_range_row
fwd_cos_bit_col_dct_dct_4, // .cos_bit_col
fwd_cos_bit_row_dct_dct_4, // .cos_bit_row
TXFM_TYPE_DCT4, // .txfm_type_col
TXFM_TYPE_DCT4
}; // .txfm_type_row
// ---------------- config fwd_dct_dct_8 ----------------
static const int8_t fwd_shift_dct_dct_8[3] = { 2, -1, 0 };
static const int8_t fwd_stage_range_col_dct_dct_8[6] = {
15, 16, 17, 18, 18, 18
};
static const int8_t fwd_stage_range_row_dct_dct_8[6] = {
17, 18, 19, 19, 19, 19
};
static const int8_t fwd_cos_bit_col_dct_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
static const int8_t fwd_cos_bit_row_dct_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_8 = {
8, // .txfm_size
6, // .stage_num_col
6, // .stage_num_row
// 0, // .log_scale
fwd_shift_dct_dct_8, // .shift
fwd_stage_range_col_dct_dct_8, // .stage_range_col
fwd_stage_range_row_dct_dct_8, // .stage_range_row
fwd_cos_bit_col_dct_dct_8, // .cos_bit_col
fwd_cos_bit_row_dct_dct_8, // .cos_bit_row
TXFM_TYPE_DCT8, // .txfm_type_col
TXFM_TYPE_DCT8
}; // .txfm_type_row
// ---------------- config fwd_dct_dct_16 ----------------
static const int8_t fwd_shift_dct_dct_16[3] = { 2, -2, 0 };
static const int8_t fwd_stage_range_col_dct_dct_16[8] = { 15, 16, 17, 18,
19, 19, 19, 19 };
static const int8_t fwd_stage_range_row_dct_dct_16[8] = { 17, 18, 19, 20,
20, 20, 20, 20 };
static const int8_t fwd_cos_bit_col_dct_dct_16[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
static const int8_t fwd_cos_bit_row_dct_dct_16[8] = { 12, 12, 12, 12,
12, 12, 12, 12 };
static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_16 = {
16, // .txfm_size
8, // .stage_num_col
8, // .stage_num_row
// 0, // .log_scale
fwd_shift_dct_dct_16, // .shift
fwd_stage_range_col_dct_dct_16, // .stage_range_col
fwd_stage_range_row_dct_dct_16, // .stage_range_row
fwd_cos_bit_col_dct_dct_16, // .cos_bit_col
fwd_cos_bit_row_dct_dct_16, // .cos_bit_row
TXFM_TYPE_DCT16, // .txfm_type_col
TXFM_TYPE_DCT16
}; // .txfm_type_row
// ---------------- config fwd_dct_dct_32 ----------------
static const int8_t fwd_shift_dct_dct_32[3] = { 2, -4, 0 };
static const int8_t fwd_stage_range_col_dct_dct_32[10] = { 15, 16, 17, 18, 19,
20, 20, 20, 20, 20 };
static const int8_t fwd_stage_range_row_dct_dct_32[10] = { 16, 17, 18, 19, 20,
20, 20, 20, 20, 20 };
static const int8_t fwd_cos_bit_col_dct_dct_32[10] = { 12, 12, 12, 12, 12,
12, 12, 12, 12, 12 };
static const int8_t fwd_cos_bit_row_dct_dct_32[10] = { 12, 12, 12, 12, 12,
12, 12, 12, 12, 12 };
static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_32 = {
32, // .txfm_size
10, // .stage_num_col
10, // .stage_num_row
// 1, // .log_scale
fwd_shift_dct_dct_32, // .shift
fwd_stage_range_col_dct_dct_32, // .stage_range_col