Skip to content
GitLab
Menu
Projects
Groups
Snippets
/
Help
Help
Support
Community forum
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
Menu
Open sidebar
Xiph.Org
aom-rav1e
Commits
f075fdc4
Commit
f075fdc4
authored
Dec 18, 2015
by
Marco Paniconi
Committed by
Gerrit Code Review
Dec 18, 2015
Browse files
Merge "Non-rd speed >=5: Include H/V intra for bsize=16x16."
parents
8f8a3b6a
c8a2c31e
Changes
1
Hide whitespace changes
Inline
Side-by-side
vp9/encoder/vp9_speed_features.c
View file @
f075fdc4
...
...
@@ -394,7 +394,7 @@ static void set_rt_speed_feature(VP9_COMP *cpi, SPEED_FEATURES *sf,
sf
->
intra_y_mode_bsize_mask
[
i
]
=
INTRA_DC_TM_H_V
;
}
else
{
for
(
i
=
0
;
i
<
BLOCK_SIZES
;
++
i
)
if
(
i
>
=
BLOCK_16X16
)
if
(
i
>
BLOCK_16X16
)
sf
->
intra_y_mode_bsize_mask
[
i
]
=
INTRA_DC
;
else
// Use H and V intra mode for block sizes <= 16X16.
...
...
Write
Preview
Supports
Markdown
0%
Try again
or
attach a new file
.
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment