Commit f5a5987f authored by Debargha Mukherjee's avatar Debargha Mukherjee
Browse files

Add stage range configurations for inv transforms

Only the col transforms are needed since the inverse transform
is designed to do row first and then col. So the row
transform can reuse the same configuration as the row transform of
a square transform of the same size.

Change-Id: I55e0bd6fca2765679be90364a65393e1787f42fe
parent 95f52605
......@@ -40,7 +40,6 @@ static const int8_t inv_cos_bit_row_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
// ---------------- 8x8 1D constants -----------------------
// shift
static const int8_t inv_shift_8[2] = { 0, -5 };
// stage range
static const int8_t inv_stage_range_col_dct_8[6] = { 5, 5, 5, 5, 4, 4 };
static const int8_t inv_stage_range_row_dct_8[6] = { 5, 5, 5, 5, 5, 5 };
......@@ -58,6 +57,29 @@ static const int8_t inv_cos_bit_row_adst_8[8] = {
13, 13, 13, 13, 13, 13, 13, 13
};
// ---------------- 4x8 1D constants -----------------------
#define inv_shift_4x8 inv_shift_8
// stage range
static const int8_t inv_stage_range_col_dct_4x8[6] =
ARRAYOFFSET6(-2, 5, 5, 5, 5, 5, 5);
static const int8_t inv_stage_range_col_adst_4x8[8] =
ARRAYOFFSET8(-2, 5, 5, 5, 5, 5, 5, 5, 5);
// cos bit
static const int8_t inv_cos_bit_col_dct_4x8[6] = { 13, 13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_col_adst_4x8[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
// ---------------- 8x4 1D constants -----------------------
#define inv_shift_8x4 inv_shift_8
// stage range
static const int8_t inv_stage_range_col_dct_8x4[4] =
ARRAYOFFSET4(2, 3, 3, 3, 3);
static const int8_t inv_stage_range_col_adst_8x4[6] =
ARRAYOFFSET6(2, 3, 3, 3, 3, 3, 3);
// cos bit
static const int8_t inv_cos_bit_col_dct_8x4[4] = { 13, 13, 13, 13 };
static const int8_t inv_cos_bit_col_adst_8x4[6] = { 13, 13, 13, 13, 13, 13 };
// ---------------- 16x16 1D constants -----------------------
// shift
static const int8_t inv_shift_16[2] = { -1, -5 };
......@@ -83,6 +105,31 @@ static const int8_t inv_cos_bit_col_adst_16[10] = { 13, 13, 13, 13, 13,
static const int8_t inv_cos_bit_row_adst_16[10] = { 12, 12, 12, 12, 12,
12, 12, 12, 12, 12 };
// ---------------- 8x16 1D constants -----------------------
#define inv_shift_8x16 inv_shift_16
// stage range
static const int8_t inv_stage_range_col_dct_8x16[8] =
ARRAYOFFSET8(-2, 7, 7, 7, 7, 7, 7, 7, 7);
static const int8_t inv_stage_range_col_adst_8x16[10] =
ARRAYOFFSET10(-2, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7);
// cos bit
static const int8_t inv_cos_bit_col_dct_8x16[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
static const int8_t inv_cos_bit_col_adst_8x16[10] = { 13, 13, 13, 13, 13,
13, 13, 13, 13, 13 };
// ---------------- 16x8 1D constants -----------------------
#define inv_shift_16x8 inv_shift_16
// stage range
static const int8_t inv_stage_range_col_dct_16x8[6] =
ARRAYOFFSET6(2, 5, 5, 5, 5, 5, 5);
static const int8_t inv_stage_range_col_adst_16x8[8] =
ARRAYOFFSET8(2, 5, 5, 5, 5, 5, 5, 5, 5);
// cos bit
static const int8_t inv_cos_bit_col_dct_16x8[6] = { 13, 13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_col_adst_16x8[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
// ---------------- 32x32 1D constants -----------------------
// shift
static const int8_t inv_shift_32[2] = { -1, -5 };
......@@ -108,6 +155,32 @@ static const int8_t inv_cos_bit_col_adst_32[12] = { 13, 13, 13, 13, 13, 13,
static const int8_t inv_cos_bit_row_adst_32[12] = { 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12 };
// ---------------- 16x32 1D constants -----------------------
#define inv_shift_16x32 inv_shift_32
// stage range
static const int8_t inv_stage_range_col_dct_16x32[10] =
ARRAYOFFSET10(-2, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9);
static const int8_t inv_stage_range_col_adst_16x32[12] =
ARRAYOFFSET12(-2, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9);
// cos bit
static const int8_t inv_cos_bit_col_dct_16x32[10] = { 13, 13, 13, 13, 13,
13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_col_adst_16x32[12] = { 13, 13, 13, 13, 13, 13,
13, 13, 13, 13, 13, 13 };
// ---------------- 32x16 1D constants -----------------------
#define inv_shift_32x16 inv_shift_32
// stage range
static const int8_t inv_stage_range_col_dct_32x16[8] =
ARRAYOFFSET8(2, 7, 7, 7, 7, 7, 7, 7, 7);
static const int8_t inv_stage_range_col_adst_32x16[10] =
ARRAYOFFSET10(2, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7);
// cos bit
static const int8_t inv_cos_bit_col_dct_32x16[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
static const int8_t inv_cos_bit_col_adst_32x16[10] = { 13, 13, 13, 13, 13,
13, 13, 13, 13, 13 };
// ---------------- 64x64 1D constants -----------------------
// shift
static const int8_t inv_shift_64[2] = { -1, -5 };
......@@ -126,6 +199,91 @@ static const int8_t inv_cos_bit_col_dct_64[12] = { 13, 13, 13, 13, 13, 13,
static const int8_t inv_cos_bit_row_dct_64[12] = { 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12 };
// ---------------- 32x64 1D constants -----------------------
#define inv_shift_32x64 inv_shift_64
// stage range
static const int8_t inv_stage_range_col_dct_32x64[12] =
ARRAYOFFSET12(-2, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11);
// cos bit
static const int8_t inv_cos_bit_col_dct_32x64[12] = { 13, 13, 13, 13, 13, 13,
13, 13, 13, 13, 13, 13 };
// ---------------- 64x32 1D constants -----------------------
#define inv_shift_64x32 inv_shift_64
// stage range
static const int8_t inv_stage_range_col_dct_64x32[10] =
ARRAYOFFSET10(2, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9);
// cos bit
static const int8_t inv_cos_bit_col_dct_64x32[10] = { 13, 13, 13, 13, 13,
13, 13, 13, 13, 13 };
// ---------------- 4x16 1D constants -----------------------
#define inv_shift_4x16 inv_shift_16
// stage range
static const int8_t inv_stage_range_col_dct_4x16[8] =
ARRAYOFFSET8(-4, 7, 7, 7, 7, 7, 7, 7, 7);
static const int8_t inv_stage_range_col_adst_4x16[10] =
ARRAYOFFSET10(-4, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7);
// cos bit
static const int8_t inv_cos_bit_col_dct_4x16[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
static const int8_t inv_cos_bit_col_adst_4x16[10] = { 13, 13, 13, 13, 13,
13, 13, 13, 13, 13 };
// ---------------- 16x4 1D constants -----------------------
#define inv_shift_16x4 inv_shift_16
// stage range
static const int8_t inv_stage_range_col_dct_16x4[4] =
ARRAYOFFSET4(4, 3, 3, 3, 3);
static const int8_t inv_stage_range_col_adst_16x4[6] =
ARRAYOFFSET6(4, 3, 3, 3, 3, 3, 3);
// cos bit
static const int8_t inv_cos_bit_col_dct_16x4[4] = { 13, 13, 13, 13 };
static const int8_t inv_cos_bit_col_adst_16x4[6] = { 13, 13, 13, 13, 13, 13 };
// ---------------- 8x32 1D constants -----------------------
#define inv_shift_8x32 inv_shift_32
// stage range
static const int8_t inv_stage_range_col_dct_8x32[10] =
ARRAYOFFSET10(-4, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9);
static const int8_t inv_stage_range_col_adst_8x32[12] =
ARRAYOFFSET12(-4, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9);
// cos bit
static const int8_t inv_cos_bit_col_dct_8x32[10] = { 13, 13, 13, 13, 13,
13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_col_adst_8x32[12] = { 13, 13, 13, 13, 13, 13,
13, 13, 13, 13, 13, 13 };
// ---------------- 32x8 1D constants -----------------------
#define inv_shift_32x8 inv_shift_32
// stage range
static const int8_t inv_stage_range_col_dct_32x8[6] =
ARRAYOFFSET6(4, 5, 5, 5, 5, 5, 5);
static const int8_t inv_stage_range_col_adst_32x8[8] =
ARRAYOFFSET8(4, 5, 5, 5, 5, 5, 5, 5, 5);
// cos bit
static const int8_t inv_cos_bit_col_dct_32x8[6] = { 13, 13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_col_adst_32x8[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
// ---------------- 16x64 1D constants -----------------------
#define inv_shift_16x64 inv_shift_64
// stage range
static const int8_t inv_stage_range_col_dct_16x64[12] =
ARRAYOFFSET12(-4, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11);
// cos bit
static const int8_t inv_cos_bit_col_dct_16x64[12] = { 13, 13, 13, 13, 13, 13,
13, 13, 13, 13, 13, 13 };
// ---------------- 64x16 1D constants -----------------------
#define inv_shift_64x16 inv_shift_64
// stage range
static const int8_t inv_stage_range_col_dct_64x16[8] =
ARRAYOFFSET8(4, 7, 7, 7, 7, 7, 7, 7, 7);
// cos bit
static const int8_t inv_cos_bit_col_dct_64x16[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
// ---------------- row config inv_dct_4 ----------------
static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_4 = {
4, // .txfm_size
......@@ -236,6 +394,7 @@ static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_8 = {
inv_cos_bit_col_dct_8, // .cos_bit_
TXFM_TYPE_DCT8 // .txfm_type
};
// ---------------- col config inv_dct_16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_16 = {
16, // .txfm_size
......@@ -358,4 +517,248 @@ static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_64 = {
TXFM_TYPE_IDENTITY64, // .txfm_type
};
#endif // CONFIG_TX64X64
// ---------------- col config inv_dct_8x4 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_8x4 = {
4, // .txfm_size
4, // .stage_num
inv_shift_8x4, // .shift
inv_stage_range_col_dct_8x4, // .stage_range
inv_cos_bit_col_dct_8x4, // .cos_bit
TXFM_TYPE_DCT4 // .txfm_type
};
// ---------------- col config inv_adst_8x4 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_8x4 = {
4, // .txfm_size
6, // .stage_num
inv_shift_8x4, // .shift
inv_stage_range_col_adst_8x4, // .stage_range
inv_cos_bit_col_adst_8x4, // .cos_bit
TXFM_TYPE_ADST4, // .txfm_type
};
// ---------------- col config inv_dct_16x4 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_16x4 = {
4, // .txfm_size
4, // .stage_num
inv_shift_16x4, // .shift
inv_stage_range_col_dct_16x4, // .stage_range
inv_cos_bit_col_dct_16x4, // .cos_bit
TXFM_TYPE_DCT4 // .txfm_type
};
// ---------------- col config inv_adst_16x4 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_16x4 = {
4, // .txfm_size
6, // .stage_num
inv_shift_16x4, // .shift
inv_stage_range_col_adst_16x4, // .stage_range
inv_cos_bit_col_adst_16x4, // .cos_bit
TXFM_TYPE_ADST4, // .txfm_type
};
// ---------------- col config inv_dct_4x8 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_4x8 = {
8, // .txfm_size
6, // .stage_num
inv_shift_4x8, // .shift
inv_stage_range_col_dct_4x8, // .stage_range
inv_cos_bit_col_dct_4x8, // .cos_bit_
TXFM_TYPE_DCT8 // .txfm_type
};
// ---------------- col config inv_adst_16x8 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_4x8 = {
8, // .txfm_size
8, // .stage_num
inv_shift_4x8, // .shift
inv_stage_range_col_adst_4x8, // .stage_range
inv_cos_bit_col_adst_4x8, // .cos_bit
TXFM_TYPE_ADST8, // .txfm_type_col
};
// ---------------- col config inv_dct_16x8 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_16x8 = {
8, // .txfm_size
6, // .stage_num
inv_shift_16x8, // .shift
inv_stage_range_col_dct_16x8, // .stage_range
inv_cos_bit_col_dct_16x8, // .cos_bit_
TXFM_TYPE_DCT8 // .txfm_type
};
// ---------------- col config inv_adst_16x8 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_16x8 = {
8, // .txfm_size
8, // .stage_num
inv_shift_16x8, // .shift
inv_stage_range_col_adst_16x8, // .stage_range
inv_cos_bit_col_adst_16x8, // .cos_bit
TXFM_TYPE_ADST8, // .txfm_type_col
};
// ---------------- col config inv_dct_32x8 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_32x8 = {
8, // .txfm_size
6, // .stage_num
inv_shift_32x8, // .shift
inv_stage_range_col_dct_32x8, // .stage_range
inv_cos_bit_col_dct_32x8, // .cos_bit_
TXFM_TYPE_DCT8 // .txfm_type
};
// ---------------- col config inv_adst_32x8 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_32x8 = {
8, // .txfm_size
8, // .stage_num
inv_shift_32x8, // .shift
inv_stage_range_col_adst_32x8, // .stage_range
inv_cos_bit_col_adst_32x8, // .cos_bit
TXFM_TYPE_ADST8, // .txfm_type_col
};
// ---------------- col config inv_dct_4x16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_4x16 = {
16, // .txfm_size
8, // .stage_num
inv_shift_4x16, // .shift
inv_stage_range_col_dct_4x16, // .stage_range
inv_cos_bit_col_dct_4x16, // .cos_bit
TXFM_TYPE_DCT16 // .txfm_type
};
// ---------------- col config inv_adst_4x16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_4x16 = {
16, // .txfm_size
10, // .stage_num
inv_shift_4x16, // .shift
inv_stage_range_col_adst_4x16, // .stage_range
inv_cos_bit_col_adst_4x16, // .cos_bit
TXFM_TYPE_ADST16, // .txfm_type
};
// ---------------- col config inv_dct_8x16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_8x16 = {
16, // .txfm_size
8, // .stage_num
inv_shift_8x16, // .shift
inv_stage_range_col_dct_8x16, // .stage_range
inv_cos_bit_col_dct_8x16, // .cos_bit
TXFM_TYPE_DCT16 // .txfm_type
};
// ---------------- col config inv_adst_8x16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_8x16 = {
16, // .txfm_size
10, // .stage_num
inv_shift_8x16, // .shift
inv_stage_range_col_adst_8x16, // .stage_range
inv_cos_bit_col_adst_8x16, // .cos_bit
TXFM_TYPE_ADST16, // .txfm_type
};
// ---------------- col config inv_dct_32x16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_32x16 = {
16, // .txfm_size
8, // .stage_num
inv_shift_32x16, // .shift
inv_stage_range_col_dct_32x16, // .stage_range
inv_cos_bit_col_dct_32x16, // .cos_bit
TXFM_TYPE_DCT16 // .txfm_type
};
// ---------------- col config inv_adst_32x16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_32x16 = {
16, // .txfm_size
10, // .stage_num
inv_shift_32x16, // .shift
inv_stage_range_col_adst_32x16, // .stage_range
inv_cos_bit_col_adst_32x16, // .cos_bit
TXFM_TYPE_ADST16, // .txfm_type
};
#if CONFIG_TX64X64
// ---------------- col config inv_dct_64x16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_64x16 = {
16, // .txfm_size
8, // .stage_num
inv_shift_64x16, // .shift
inv_stage_range_col_dct_64x16, // .stage_range
inv_cos_bit_col_dct_64x16, // .cos_bit
TXFM_TYPE_DCT16 // .txfm_type
};
#endif // CONFIG_TX64X64
// ---------------- col config inv_dct_8x32 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_8x32 = {
32, // .txfm_size
10, // .stage_num
inv_shift_8x32, // .shift
inv_stage_range_col_dct_8x32, // .stage_range
inv_cos_bit_col_dct_8x32, // .cos_bit_col
TXFM_TYPE_DCT32 // .txfm_type
};
// ---------------- col config inv_adst_8x32 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_8x32 = {
32, // .txfm_size
12, // .stage_num
inv_shift_8x32, // .shift
inv_stage_range_col_adst_8x32, // .stage_range
inv_cos_bit_col_adst_8x32, // .cos_bit
TXFM_TYPE_ADST32, // .txfm_type
};
// ---------------- col config inv_dct_16x32 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_16x32 = {
32, // .txfm_size
10, // .stage_num
inv_shift_16x32, // .shift
inv_stage_range_col_dct_16x32, // .stage_range
inv_cos_bit_col_dct_16x32, // .cos_bit_col
TXFM_TYPE_DCT32 // .txfm_type
};
// ---------------- col config inv_adst_16x32 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_16x32 = {
32, // .txfm_size
12, // .stage_num
inv_shift_16x32, // .shift
inv_stage_range_col_adst_16x32, // .stage_range
inv_cos_bit_col_adst_16x32, // .cos_bit
TXFM_TYPE_ADST32, // .txfm_type
};
#if CONFIG_TX64X64
// ---------------- col config inv_dct_64x32 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_64x32 = {
32, // .txfm_size
10, // .stage_num
inv_shift_64x32, // .shift
inv_stage_range_col_dct_64x32, // .stage_range
inv_cos_bit_col_dct_64x32, // .cos_bit_col
TXFM_TYPE_DCT32 // .txfm_type
};
// ---------------- col config inv_dct_16x64 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_16x64 = {
64, // .txfm_size
12, // .stage_num
inv_shift_16x64, // .shift
inv_stage_range_col_dct_16x64, // .stage_range
inv_cos_bit_col_dct_16x64, // .cos_bit
TXFM_TYPE_DCT64, // .txfm_type_col
};
// ---------------- col config inv_dct_32x64 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_32x64 = {
64, // .txfm_size
12, // .stage_num
inv_shift_32x64, // .shift
inv_stage_range_col_dct_32x64, // .stage_range
inv_cos_bit_col_dct_32x64, // .cos_bit
TXFM_TYPE_DCT64, // .txfm_type_col
};
#endif // CONFIG_TX64X64
#endif // AV1_INV_TXFM2D_CFG_H_
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