- 05 Apr, 2017 10 commits
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James Zern authored
this also clears the remaining -Wshorten-64-to-32 warnings in this file. the previous patch ported from libvpx was incomplete due to: d3a7576f Add compiler flag -Wsign-compare Change-Id: I105fa2342073dfa8bd0619b4282435fb6568f5c9
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Jingning Han authored
Change-Id: I4038d971455626c4c8e93b9b83e9155c5170349e
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Jingning Han authored
This commit integrates the level map coding within cb4x4 framework. Change-Id: Ied9721df0a7ffd21d1d69d68759d91b6c320c179
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Jingning Han authored
Change-Id: I5dec82552b41a5523155b2dea9e05ce69fba4917
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Jingning Han authored
Change-Id: I215c4bed9ba5c7f4fc93533249610217de14ce54
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Yushin Cho authored
Change-Id: Idfe23c1aef5d080567094af6e87d65bda3835ae5
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Yushin Cho authored
Change-Id: I7b855a68c5fedda4e34bfcbbabafa9ba52c09735
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Yushin Cho authored
Change-Id: I2fd1d6f32b1b395dfdbe556b96dddf65f3cabbbe
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Yushin Cho authored
Change-Id: I4f7d37af84220971a839f4f8f42aafa1adeb04e4
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Tristan Matthews authored
Change-Id: Ia79346bcee77c20def193dc790da665d425539de
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- 04 Apr, 2017 16 commits
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Jingning Han authored
Remove the unused variable when cb4x4 is enabled. Change-Id: I0d4d9ebd989cf90b9373d9989dd5e78b93d59e25
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Angie Chiang authored
Change-Id: I35b2b69e3937e70a7923ba76735f035f366de27f
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Angie Chiang authored
Change-Id: I00554b925c0a870e766bc116c6d9cb02bd47a101
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Angie Chiang authored
Change-Id: I785a0fbef18adf7cbdbd4f09117d132c7fe69156
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Debargha Mukherjee authored
Reduces precision in find_affine_int() function. Makes the maximum mv allowed 512 from 1024. Negligible impact on coding efficiency. Change-Id: I76d4c6824528e3f940d1275fe0bd22d71015a8d0
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Cheng Chen authored
Change-Id: I4b77388fa49e29a8302fe8c3276471e8156ce2d5
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Angie Chiang authored
This will make the code cleaner Change-Id: I94622b696b0a8d51d28dbbe29c767a62942bc5f3
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Sarah Parker authored
This was introduced in 72e2e982 Change-Id: Ia4d0a0606a518964d5f6f257874f8f3d5b4d651b
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Jean-Marc Valin authored
high-latency, cpu=0: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 0.0817 | -0.4672 | -0.6651 | 0.1043 | 0.0968 | 0.1063 | -0.1847 low-latency, cpu=0: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 0.0860 | -0.7110 | -0.7393 | 0.1018 | 0.0946 | 0.1800 | -0.1537 low-latency, cpu=4: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 0.0097 | -0.8022 | -0.7514 | -0.0115 | 0.0621 | -0.0092 | -0.3804 Change-Id: I5c2eced295598771c7a74ec15a5f0eb84d872cc9
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Yunqing Wang authored
BUG=aomedia:395 Change-Id: I381f16e66e2540c9bf24727abf8915a3850dcc92
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Sean Purser-Haskell authored
Change-Id: Id32a6a21ffda48ef16b027b55f9082614f389003
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Thomas Davies authored
Running this test in Jenkins causes all but trivial changesets to fail unless the hash is changed. Other changes in master can meanwhile cause the hash to be out of date by the time of merge even if it is changed, so rebases of previously passing changesets will then fail again. Change-Id: I4ee5010ceec85da7eedd8ada2d171f64a92491c1
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Jingning Han authored
This commit fixes a residual parameter set conflicts in function copy_dering_16bit_to_16bit(), due to the change of cb4x4 support approach in cdef to better respect od_dering.c as a codec independent file. Change-Id: I7e2295cf6a083729077374b13836909bb611d573
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Thomas Davies authored
Change-Id: Ifd55343b701eb753537b9711abd377adcedde8ec
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Jean-Marc Valin authored
Change-Id: Ibe19f4422324680b0d3132eab79bdc035911d79d
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Jean-Marc Valin authored
Change-Id: I7ca73e03ed171b57a05dd1fd5957906e11b66728
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- 03 Apr, 2017 14 commits
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Urvang Joshi authored
Change-Id: I0f4576522a07597dbb04089b02ca1fae67075ba4
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Angie Chiang authored
Move most of the code of inverse_transform_block to av1_inverse_transform_block such that encoder can use the function as well. Use av1_inverse_transform_block in av1_encoder_block_intra. This will make the code cleaner. Change-Id: I84dbeef2c65e252910606dbea446ce43165d504c
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Angie Chiang authored
This will simplify the code flow in av1_subtract_txb() Change-Id: I575da4a74f435b5862d2a848bdedae9856672121
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Angie Chiang authored
A simpler interface for intra block prediction Change-Id: I97e3f385746928d87999e6862b1d71a197df0302
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Angie Chiang authored
This function help us merge subtract block code in av1_subtract_plane and av1_encode_block_intra. Change-Id: Ie793d88a218f1082c6fe28900a521f461e34d564
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Alex Converse authored
Change-Id: I463d01ecf0ef2d666c38f9dec510b8b0b1eecadc
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Alex Converse authored
It's less invasive and helps make future changes easier. Change-Id: I0f858462f14109ace4d76a31daeac4289c94bc6e
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Thomas Davies authored
EXT_TILE: allocate variables on the heap due to the potentially large number of tiles. ANS: initialise tile contexts. EXT_INTER, MOTION_VAR, WARPED_MOTION: fix compilation. Change-Id: I43a9d01c2442d97b6a8875712f77d932dce3740d
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Thomas Davies authored
A bug, but no change to BDR. Change-Id: I17fbe836fd72d148a4f0608fcff7e2fbcaf75eb0
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Sarah Parker authored
Change-Id: Idae4934424b3e0c2de659e3f55ea6a47b5b4ceab
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Steinar Midtskogen authored
Change-Id: I6173dfb181777343d254aef880a8c9d379206556
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Steinar Midtskogen authored
On x86 there is no direct v128_shr_n_s8 equivalent, so v128_cmplt_s8(a, v128_zero()) is much better than v128_shr_n_s8(a, 7). Should have no impact on NEON. Also replace v256_from_v128(v128_from_v64(a, b), v128_from_v64(c, d)) with v256_from_v64(a, b, c, d). Change-Id: I711e3cb250689089d7b5336a294e9d6bdd998445
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Jean-Marc Valin authored
Previous code was using options selected for N=8 rather than the chosen number of options. low-latency, cpu=4: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 0.0077 | 0.0286 | -0.1166 | -0.0059 | -0.0479 | 0.0025 | -0.0101 Properly save the best strengths Change-Id: I629e929c2bc7a0a9592a9e49bfd7898d95174235
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Michael Bebenita authored
Change-Id: I46101bf22f38a642850b875fb333e7c6b9c1d5b8
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