1. 18 Dec, 2017 1 commit
  2. 14 Dec, 2017 1 commit
    • Luc Trudeau's avatar
      [Clean Up] Remove get_y_mode() · 2eb9b845
      Luc Trudeau authored
      The get_y_mode function, is superfluous, not used consistently, and requires a
      useless block_idx parameter than gets pass around a lot inside the
      codebase for no apparent reason.
      
      The block parameter is misleading, as it could cause people to think all these
      functions actually use this value.
      
      Change-Id: I7ae0a8d1282c009b9114c83771cce10f5c2ee397
      2eb9b845
  3. 13 Dec, 2017 3 commits
  4. 11 Dec, 2017 2 commits
  5. 09 Dec, 2017 1 commit
    • Debargha Mukherjee's avatar
      Enable 4:1 -> 2:1 -> 1:1 splits for 4:1 transforms · e4e18fcc
      Debargha Mukherjee authored
      Also, splits the sub_tx_size_map array into inter and intra
      in order to enable the new 4:1 transforms for inter and
      intra separately.
      Includes refactoring such as removing the intra_tx_size_cat_lookup
      array since it is unnecessary, and consolidating the
      max_txsize_rect_lookup array for convenience.
      
      Change-Id: I112553bab612dafb973611c87f36a43e1ac4be85
      e4e18fcc
  6. 08 Dec, 2017 1 commit
    • Sarah Parker's avatar
      Remove bands from new-quant profiles · 6b56e99c
      Sarah Parker authored
      Rather than having a set of parameters for each of the 6
      COEF_BANDS, we have 1 for DC and 1 for AC coefficients.
      No change in performance since all of the bands had the
      same parameters.
      
      Change-Id: I3665e7c1b21f117be776f371d87d64b097715735
      6b56e99c
  7. 07 Dec, 2017 3 commits
  8. 06 Dec, 2017 1 commit
  9. 30 Nov, 2017 4 commits
    • Urvang Joshi's avatar
      optimize_b_greedy: Fix for TX64X64. · ebecbd3d
      Urvang Joshi authored
      Change-Id: Iff2780944e954973b9ee9ab3c04d1e6b44a7810d
      ebecbd3d
    • Luc Trudeau's avatar
      [CFL] CfL Initialization Simplification · 1e84af52
      Luc Trudeau authored
      The CfL context is now stored inside MACROBLOCKD instead of
      MACROBLOCKD only storing a pointer to the CfL context.
      The intent is to avoid race conditions as MACROBLOCKD is stored
      inside ThreadData. This change also simplifies CfL Initialization.
      
      Change-Id: I991503716b21fc9aca60caddb2008b8bff397e6d
      1e84af52
    • Debargha Mukherjee's avatar
      Do not use avx2 quantizer for 4:1 transforms · 24e31043
      Debargha Mukherjee authored
      Change-Id: I4b1a386ff989d63c7230923b36cb230b18466143
      24e31043
    • Debargha Mukherjee's avatar
      Refactor/Change the entropy context for transforms · b3eda2f4
      Debargha Mukherjee authored
      The change makes the entropy context for transforms use
      the same mechanism as with and without lv_map.
      For the non-lv-map case the context is now based on the
      the larger transform dim for 2:1 rect transforms. The context
      is now the average for 4:1 rect transforms for both lv-map and
      non-lv-map cases.
      There is one small fix for level map for getting the correct
      rate when skip is set.
      
      BDRATE: lowres, 30 frames, speed 1: -0.15% gain for the
      non-lv-map case on the baseline.
      
      Change-Id: I06a583d33bef68202d72a88e077f8d31cc5e7fe4
      b3eda2f4
  10. 29 Nov, 2017 1 commit
  11. 28 Nov, 2017 2 commits
  12. 27 Nov, 2017 2 commits
    • Debargha Mukherjee's avatar
      Add option to disable split partitions for chroma · 891a8774
      Debargha Mukherjee authored
      When the flag DISABLE_VARTX_FOR_CHROMA is on chroma is
      constrained to always use the largest transform size
      for the prediction unit size.
      This is meant to simnplify the logic for transform size
      selection for chroma with hopefully no loss.
      
      Results:
      lowres 30 frames, speed 1: -0.038% (a slight improvement).
      lowres 30 frames, speed 0: 0.000% (noise level difference).
      
      Change-Id: I14dd5b1983d908bd98e59b7d252e11f5755c97e6
      891a8774
    • Debargha Mukherjee's avatar
      Add chroma bsize modifications correctly · 3aa28111
      Debargha Mukherjee authored
      Change-Id: I807dc86489bc9219a24801841e66b555a2d7a51f
      3aa28111
  13. 22 Nov, 2017 2 commits
  14. 21 Nov, 2017 2 commits
  15. 20 Nov, 2017 2 commits
    • Monty Montgomery's avatar
      Remove use of av1_get_tx_scale in Daala TX · 27d1b373
      Monty Montgomery authored
      Daala TX does not scale coefficients based on TX size.  Although
      previous patches force av1_get_tx_scale() to always return zero when
      CONFIG_DAALA_TX is true, this patch removes the call entirely.  This
      represents no functional change.
      
      subset-1:
      monty-rest-of-stack-Q3-s1@2017-11-13T14:39:52.160Z ->
       monty-rest-of-stack-rmscale-s1@2017-11-13T14:40:20.646Z
      
        PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      0.0000 |     N/A |  0.0000 |   0.0000 | 0.0000 |  0.0000 |     0.0000
      
      Change-Id: I5757282153c291c59510b17b5f71b3e0a56382ca
      27d1b373
    • Monty Montgomery's avatar
      Modify RDO for use with Daala TX constant-depth coeffs · 4a05a58c
      Monty Montgomery authored
      Modify the portions of RDO using TX-domain coeff calaculations to deal
      with TX_COEFF_DEPTH and constant-depth coefficient scaling.  At
      present, this represents no functional change.
      
      subset-1:
      monty-rest-of-stack-quant-s1@2017-11-13T14:38:43.774Z ->
       monty-rest-of-stack-RDO-s1@2017-11-13T14:39:17.093Z
      
        PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      0.0000 |  0.0000 |  0.0000 |   0.0000 | 0.0000 |  0.0000 |     0.0000
      
      objective-1-fast --limit=4:
      monty-rest-of-stack-quant-o1f4@2017-11-13T14:38:28.828Z ->
       monty-rest-of-stack-RDO-o1f4@2017-11-13T14:38:57.951Z
      
        PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      0.0000 |  0.0000 |  0.0000 |   0.0000 | 0.0000 |  0.0000 |     0.0000
      
      Change-Id: I0fbc45e018f565f48e1fc8fdeabfcd6cb6fa62fe
      4a05a58c
  16. 16 Nov, 2017 1 commit
    • Monty Montgomery's avatar
      Eliminate tx_size dependant shifts for Daala TX · a26262c3
      Monty Montgomery authored
      short-circuit av1_get_tx_scale to always return zero when
      CONFIG_DAALA_TX, and remove it from the actual Daala TX toplevel
      
      This has potential overflow consequences for any metrics computation
      based on pixels; as such, also force use of the high-bitdepth path in
      each of these case.
      
      subset-1:
      monty-rest-of-stack-baseline-s1@2017-11-13T00:39:03.881Z ->
      monty-rest-of-stack-noshift-s1@2017-11-13T14:37:42.541Z
      
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.0030 | -0.0523 |  0.2656 |  -0.0239 | -0.0033 | -0.0029 |     0.0067
      
      objective-1-fast --limit=4:
      monty-rest-of-stack-baseline-o1f4@2017-11-13T00:37:06.999Z ->
      monty-rest-of-stack-noshift-o1f4@2017-11-13T14:37:16.992Z
      
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.0264 |  0.2303 |  0.0822 |  -0.0109 | -0.0395 | -0.0709 |     0.0538
      
      Change-Id: I57da71861f105dc7a404fa75a75bde573855ef79
      a26262c3
  17. 15 Nov, 2017 1 commit
    • Debargha Mukherjee's avatar
      Replace RECT_TX_EXT experiment · 35a4db38
      Debargha Mukherjee authored
      Remove the previous experiment and now use the same name for a
      simpler experiment that only enables 4:1 transforms for 4:1
      partitions when ext_partition_types is on, and that which was
      previously enabled with the USE_RECT_TX_EXT macro.
      
      Change-Id: Iccc35744bd292abf3c187da6f23b787692d50296
      35a4db38
  18. 14 Nov, 2017 2 commits
    • Monty Montgomery's avatar
      Simplify Daala inverse TX toplevel for constant shift · 359854fe
      Monty Montgomery authored
      Rather than backing out all the LGT-related shifting matrices
      throughout the existing TX code, separate out and simplify Daala
      inverse TX into a single dedicated entry point.  When DAALA_TX is
      enabled, CONFIG_HIGHBITDEPTH is also forced, and all of Daala TX
      (lowbd and highbd) uses this single TX dispatch.
      
      This patch is purely non-functional changes.
      
      subset 1:
      monty-TXtesting-fwd-s1@2017-11-12T05:25:09.557Z ->
       monty-TXtesting-inv-s1@2017-11-12T05:25:43.878Z
      
        PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      0.0000 |  0.0000 |  0.0000 |   0.0000 | 0.0000 |  0.0000 |     0.0000
      
      objective-1-fast:
      monty-TXtesting-fwd-o1f@2017-11-12T05:25:29.386Z ->
       monty-TXtesting-inv-o1f@2017-11-12T05:25:58.897Z
      
        PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      0.0000 |  0.0000 |  0.0000 |   0.0000 | 0.0000 |  0.0000 |     0.0000
      
      Change-Id: I790e8d7ac08eb214eb712f5441d6e5f76ebddf17
      359854fe
    • Yue Chen's avatar
      Add the option of using 1:4/4:1 tx_size+sb_type · 0797a208
      Yue Chen authored
      Change-Id: I96e5ff72caee8935efb7535afa3a534175bc425c
      0797a208
  19. 11 Nov, 2017 1 commit
    • Monty Montgomery's avatar
      Add is_hbd field to TxfmParam · 26b8a99e
      Monty Montgomery authored
      In preparation for Daala unified LBD/HBD TX, add (and use) is_hbd
      field in TxfmPama structure.  This field indicates whether or not
      pixel data is using 8 or 16 bit reference buffers (currently ambiguous
      in the case of 8 bit input).
      
      Change-Id: I28bca792a48ffa00e208617adb072b08ff816e3c
      26b8a99e
  20. 09 Nov, 2017 2 commits
    • Sebastien Alaiwan's avatar
      Remove LGT experiment · 2fa189e5
      Sebastien Alaiwan authored
      This experiment has been abandonned for AV1.
      
      Change-Id: If560a67d00b8ae3daa377a59293d5125a8cb7902
      2fa189e5
    • Monty Montgomery's avatar
      Separate quantizers used for quantization from RDO · 125c0fca
      Monty Montgomery authored
      Generalize quantizer setup so that quantization and TX can use
      different coefficient shifts/scalings without inpacting RDO lambda
      generation.
      
      This patch is documentaiton + a minor refactor setting up later
      work; it causes no functional change.
      
      monty-daalaTX-fulltest-Daalabaseline-o1f@2017-11-07T00:01:20.779Z ->
       monty-daalaTX-fulltest-DaalaRDO-o1f@2017-11-07T00:02:31.347Z
      
      PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000
       N/A |  0.0000 |  0.0000 |      N/A |  N/A |     N/A |        N/A
      (note-- the numbers above were collected using --cpu-used=3, which
       appears to be newly broken.)
      
      monty-daalaTX-fulltest-Daalabaseline-o1f4@2017-11-07T05:59:16.553Z ->
       monty-daalaTX-fulltest-DaalaRDO-o1f4@2017-11-07T05:59:50.180Z
      
        PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      0.0000 |  0.0000 |  0.0000 |   0.0000 | 0.0000 |  0.0000 |     0.0000
      
      monty-daalaTX-fulltest-Daalabaseline-s1@2017-11-07T00:01:46.582Z ->
       monty-daalaTX-fulltest-DaalaRDO-s1@2017-11-07T00:02:56.282Z
      
        PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      0.0000 |  0.0000 |  0.0000 |   0.0000 | 0.0000 |  0.0000 |     0.0000
      
      Change-Id: Ia5a3c052eacd17184ca1b0fe6d032cfb9afdb77f
      125c0fca
  21. 05 Nov, 2017 1 commit
  22. 02 Nov, 2017 1 commit
    • Sebastien Alaiwan's avatar
      Remove experimental flag of EXT_TX · 3bac9928
      Sebastien Alaiwan authored
      This experiment has been adopted, we can simplify the code
      by dropping the associated preprocessor conditionals.
      
      Change-Id: I02ed47186bbc32400ee9bfadda17659d859c0ef7
      3bac9928
  23. 01 Nov, 2017 1 commit
    • Sarah Parker's avatar
      Use tx_size 1 level down for transform type search · 90024e44
      Sarah Parker authored
      This addresses an inconsistency between the set used
      to decode the tx_type in the bitstream and the set used
      for the tx_type search. Previously, the set used to
      read/write the tx_type was based on the smallest tx_size
      in the vartx partitioning, but the search uses a set
      based on the largest possible tx_size. This patch
      changes the tx_type search to use the transform type
      set associated with the tx_size 1 recursive level down from
      the max square tx_size to make the search more consistent
      with the bitstream syntax. If a tx_size is selected for an
      invalid tx_type, DCT_DCT is used for that partition instead.
      
      This patch also adds assertions to all exposed transform
      functions to ensure that no illegal transform type/size
      combinations occur.
      
      This currently gets a 0.1% drop in performance on lowres.
      The drop is due to the reduction of the tx_types available
      for 32x16 and 16x32 transform sizes. Before this patch,
      32x16 and 16x32 transforms were getting assigned a
      set of 12 tx_types, some of which we did not intend to
      support for these sizes.
      
      Change-Id: I44aca4876b261c345623cd04ad6235bca4532701
      90024e44
  24. 31 Oct, 2017 1 commit
    • Debargha Mukherjee's avatar
      Adding a speed feature for tx_size search · 51666866
      Debargha Mukherjee authored
      This patch factors out a function that computes the rd cost for
      a given transform type given the transform partition already
      computed. This is then used to develop a speed feature where the
      transform size search disables trellis optimization but once the
      transform sizes are decided, a final search is conducted with
      optimization turned back on.
      This patch does not change anything in speed 0 yet.
      
      Change-Id: I30acfc5e2dd353d711e5f4260d5b344847b03ade
      51666866
  25. 24 Oct, 2017 1 commit
    • Angie Chiang's avatar
      Make rd/enc optimize_txb uses same fast_mode · 87278292
      Angie Chiang authored
      The performance drop introduced by inconsistency decision between
      optimize_txb in rd loop and final encoding phase.
      
      By making them use the same fast_mode,  will speed up encoder
      without having the performance drop
      
      Change-Id: If25e253cf99b6f17353b4031d03b57da50a1cd95
      87278292