- 15 Aug, 2017 2 commits
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Thomas Davies authored
No change to metrics, as quantization matrices are not used unless --enable-qm=1 is set on the command line. Fix no highbitdepth compilation, and fix compile errors and warnings for PVQ and NEW_QUANT experiments. Change-Id: I49aceb5acf6ca6790c81e760e5b208788f87086d
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Monty Montgomery authored
This experiment replaces the 32-point Type-II DCT and 32-point Type-IV DST scaling vp9 transforms with the 32-point orthonormal Daala transforms. subset-1: monty-square-baseline-s1-F3@2017-08-02T11:50:51.375Z -> monty-square-dct32-s1-F3@2017-08-02T11:50:18.859Z PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 0.0000 | 0.0115 | -0.1044 | -0.0185 | -0.0069 | -0.0603 | 0.0555 objective-1-fast (4 frames): monty-square-baseline-o1f-F3-l4-fine@2017-08-12T02:18:05.560Z -> monty-square-dct32-o1f-F3-l4-fine@2017-08-12T02:19:44.461Z PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 -0.0269 | -0.0715 | N/A | -0.0547 | -0.0268 | -0.0590 | N/A Change-Id: Ib1bad991d82eb67956e94a6216298a84e908b169
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- 14 Aug, 2017 6 commits
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Wei-Ting Lin authored
Change-Id: Iebc527697548355ea2e92e2fbc2faa46f16ef0db
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Tom Finegan authored
Correct conditionals and group sources by experiment flag. Change-Id: I52f38a0c8fdd52f840e67584de3bca24d4af597d
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Tom Finegan authored
Removed extra trailing ')'. Change-Id: I3231f15789b4f604e03babbdbe7899167adc349c
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Tom Finegan authored
Also adds a missing function doc comment. Change-Id: I0ff00cb326709134259b0aecc6b60046f209d2a8
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Alex Converse authored
Change-Id: I5d5a93b27a42d591ff41ff23c007fc2954d2f9a7
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Cheng Chen authored
Add asserts for switch. Add helper functions to make selection of plane functions readable. Remove extra { such that brackets match. Change-Id: I048f3e5e0822bf1669fdcbedb84a0255139df686
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- 12 Aug, 2017 1 commit
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Thomas Daede authored
Change-Id: I61165218afefe7fc59ad06a0abe0180754cdf7bd
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- 11 Aug, 2017 8 commits
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Yi Luo authored
The constants used in pixel clamping is based on bitdepth. Their calculation is moved outside pixel clamping and does only once. This achieves about <2% speed improvement on decoder. Change-Id: I48dcaebe04a3478962c3b6568d247a23b47a89d4
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Yunqing Wang authored
This reverts commit 29824a42. Unit test failure was seen. AV1/AVxEncoderThreadLSTest.EncoderResultTest/2 AV1/TileIndependenceTestLarge.MD5Match/2 Change-Id: I836b6ef8b8eeac45014a439d1f5d4d45d17110f9
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Tom Finegan authored
Change-Id: I79f908264d0f5562931e757db36410410f3a03e3
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Urvang Joshi authored
The SSE4 function does not support 64x64 size, and was triggering an assertion failure lowbitdepth is disabled. BUG=aomedia:672 Change-Id: Id14e76b5c180a211a84c2e933b07e8acf72dddbc
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Steinar Midtskogen authored
Low latency, cpu-used=0: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 -0.3162 | -0.6719 | -0.6535 | 0.0089 | -0.3890 | -0.1515 | -0.6682 High latency, cpu-used=0: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 -0.0293 | -0.3556 | -0.5505 | 0.0684 | -0.0862 | 0.0513 | -0.2765 Low latency, cpu-used=4: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 -0.2248 | -0.7764 | -0.6630 | -0.2109 | -0.3240 | -0.2532 | -0.6980 High latency, cpu-used=4: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 -0.1118 | -0.5841 | -0.7406 | -0.0463 | -0.2442 | -0.1064 | -0.4187 Change-Id: I9ca8399c8f45489541a66f535fb3d771eb1d59ab
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Tom Finegan authored
Disable CONFIG_NCOBMC and CONFIG_NCOBMC_ADAPT_WEIGHT when CONFIG_WARPED_MOTION is enabled. BUG=aomedia:683 Change-Id: Id676daaef89b6364579707ecd16826715b641ac2
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Tom Finegan authored
- Add change_config_and_warn(), which basically does what it says. - Fixed some indent issues. - Added doc comment for create_dummy_source_file(). Change-Id: I748eec7ff63bd43af8c7a91be1e734b28f7d43d0
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Sarah Parker authored
A speed feature was causing the rdloop to skip trying MRC_DCT. I've disabled that speed feature when mrc-tx is enabled and MRC_DCT is allowed for inter blocks. Change-Id: I0affa5f26465539414b2957f8ff983f718863ef1
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- 10 Aug, 2017 13 commits
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Yunqing Wang authored
This CL follows the original one"Sample selection in warped motion", and aims to reduce the number of samples gathered. We only search 1 above row and 1 left column instead of 1/2 bsize range in each direction. The gain is a little less, but not much. Borg test result: avg_psnr ovr_psnr ssim cam_lowres: -0.225 -0.228 -0.231 lowres: -0.081 -0.075 -0.114 The changes are wrapped in WARPED_MOTION_SORT_SAMPLES macro. Change-Id: Ifb499c80470b2ffe7a40f68fc401589faada7730
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Jingning Han authored
Use the rate cost to replace the probability fetch. This improves the encoding speed of level map by 10%. No coding stats change. Change-Id: Iab0beac5da291eed50f657549667d4edffb4ead8
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Angie Chiang authored
We're only interested in AOM_CODEC_CX_FRAME_PKT, but the encoder might output packets from other types (e.g when CONFIG_INTERNAL_STATS). Change-Id: I1c153ca7519067dc82cb76b131b09a537bb37f62
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Urvang Joshi authored
This experiment is now adopted as it was cleared by Tapas. Note: Palette use can still be controlled by command-line option "--tune-content=..." in 'aomenc'. Change-Id: I832f49f20f60c34bdef5b424755849c496687e87
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hui su authored
It's not being used anymore. Change-Id: I866874dcc5485cf3db8c66e8d3e76ac45193e58c
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Hui Su authored
Change-Id: Ida42485e3fd44d332d70cb57010a0add2436abfe
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Hui Su authored
Fix ubsan test warnings. Change-Id: I3b5849277c9c8cd387c709238a6453e19705d791
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Alex Converse authored
Drops k_means from 15% of profile to 4.2%. BUG=aomedia:670 Change-Id: I9c60f024abde9112eec8c32ead482f885ed6e57a
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Yi Luo authored
- Speed test (ms) on i7-6700, Linux x86_64 FUNCTION SSE2 AVX2 horizontal_edge_16 55 28 vertical_16_dual 84 47 horizontal_4_dual 27 13 horizontal_8_dual 36 15 vertical_4_dual 38 25 vertical_8_dual 44 27 - Decoder frame rate improves around 1.2% - 2.8%. Change-Id: I9c4123869bac9b6d32e626173c2a8e7eb0cf49e7
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James Zern authored
Change-Id: Iaaeae08d46f26981e4a707cf1dd5af9c5c78d486
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Urvang Joshi authored
The problem was that some functions were using scale_chroma_bsize() function to turn sub-8x8 'bsize' to 8x8 'bsize', and then the modified 'bsize' was being passed to rd_pick_intra_sbuv_mode() for example. In such cases, we cannot rely on the 'bsize' value passed to the function; instead, we need to look at the original mbmi->sb_type directly. Also: - Added created a common function can_use_palette() to refactor this logic into one place. - Added more asserts to easily catch such coding errors in future. BUG=aomedia:688 Change-Id: I2e9f20c8c5fbc4b3ff41b703a91a02758c3c632f
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Sebastien Alaiwan authored
Change-Id: I62f7dca3d0d5aa9648c8a444f11f0f2a8bb3845b
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James Zern authored
Change-Id: I558106e3e415cbcbb6673d24349daed48b616034
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- 09 Aug, 2017 8 commits
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Rupert Swarbrick authored
aq_mode and deltaq_mode are enums starting at zero so checking they are in the range 0..X triggers a clang warning of the form "comparison of unsigned enum expression >= 0 is always true". Change-Id: Ia41d819958ae5a1ac10e6da5550169a2a326bf1a
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Yushin Cho authored
Because the palette is not supported by PVQ yet. Change-Id: If432f5c43d24726ad99161f1f76fa6c28267ca8b
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Rupert Swarbrick authored
When doing OBMC prediction, the code must iterate over the blocks above or to the left of the current block. In reconinter.c and rdopt.c, there are several pieces of code that do this. These all work in roughly the same way, iterating over the xd->mi array (although some are written with for loops and others with do/while). To visit each neighbouring block exactly once, each of these loops used an "mi_step" variable which was set to the width or height of the neighbouring block in mi-units and the loop counter got incremented by mi_step to jump to the next block. This patch unifies the code slightly (just using for loops) and simplifies it when the CHROMA_SUB8X8 experiment is enabled. In this case, chroma information is stored in the bottom right block of each 8x8 pixel region. That is, if a block has width 4 and an even mi_col, the chroma information we need is actually found in the block immediately to its right. The existing code implemented this by bumping the current column or row counter (usually mi_col_offset or mi_row_offset) and duplicating the first part of the loop body to do it again with the new counter. It also had to double mi_step to avoid visiting the next-door block again. The new code essentially just uses the "continue" keyword to restart the loop. There's a little more book-keeping required: we might have to increment "ilimit", the maximum loop index, to ensure we don't exit the loop too early. The result is hopefully easier to read, but it's also more general (in the CHROMA_SUB8X8 case). The existing code assumed the current block never had width or height below 8 and thus mi_col and mi_row were always even. As such, whenever the neighbouring block had a width or height of 4, we knew that we needed to skip to the next neighbouring block to get the required chroma information. This version of the code can deal with the current block being smaller. The main difference is that it decides whether to skip forward by examining the parity of (mi_col + i) or (mi_row + i). This change will be needed for 16x4/4x16 block support. Change-Id: I39c1bbc00a6e2ad1ac17b8eed3980a8bcc040074
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Angie Chiang authored
Change-Id: I0b67ad4f37a22812472b191e0a6f1d218430c454
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Angie Chiang authored
This test makes sure two things: 1) txfm stage range is within desired limit (lbd:16 bits hbd:32 bits) 2) txfm stage range + cos bits is within desired limit (lbd:32 bits hbd:32 bits) Change-Id: Ie2cc3c8265810e034c1461def4717fa9d4c29945
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Angie Chiang authored
Change-Id: Ie2f83f2f9369a22b70150ba44ddb6f82d6b6b514
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Rupert Swarbrick authored
Since there are no CDFs set up for palettes for 4:1/1:4 blocks, we should make sure we don't try to use them. Without this patch, write_palette_mode_info gets called with a bsize of BLOCK_32X8 and reads (and writes) off the end of the palette_y_size_cdf array. This patch avoids calling it in this context and adds an assertion to make sure we don't read off the end of the array in future. The patch also adds the corresponding logic to rdopt.c. Change-Id: I4d9aea982d057e305a6b578f35457eada819d38f
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Sebastien Alaiwan authored
Change-Id: I1456837714323c6cbfd66a47eb5dfa1fe4eeeabd
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- 08 Aug, 2017 2 commits
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RogerZhou authored
Change-Id: Iec7969ffd8f53ca2f4eefd1d757cfec7b3bde131
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Sarah Parker authored
This allows inter and intra modes to use different mask functions. The mask functions checked in are still place holders to allow for easy experimentation. Change-Id: Ic20d88200676df81dffee8c43555d0ff0c7bfc28
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