1. 26 Oct, 2011 1 commit
    • Attila Nagy's avatar
      Reduce partial frame copy in encoder's pick_filter_level_fast · de828094
      Attila Nagy authored
      The partial frame copy function used to copy an extra 8 lines above
      and  below. The partial frame filtering can only modify 3 pixel rows
      above the partial frame. Reduce copy to bare minimum needed, which is
      4 lines, so that partial filtering on copied frame is possible.
      
      Define the "magic" fraction number for partial filtering in
      loopfilter.h .
      
      Change-Id: I4791ffc541b6884b12759a0d0714a8faf16147ec
      de828094
  2. 20 Sep, 2011 2 commits
  3. 19 Sep, 2011 1 commit
    • Tero Rintaluoma's avatar
      NEON walsh transform updated to match C · 2a4b2a00
      Tero Rintaluoma authored
      Modified original patch If2f07220885c4c3a0cae0dace34ea0e36124f001
      according to comments. Scheduled code a little bit to prevent some
      interlocks.
      
      Change-Id: I338f02b881098782f82af63d97f042b85e63e902
      2a4b2a00
  4. 09 Jun, 2011 1 commit
  5. 01 Jun, 2011 1 commit
    • Tero Rintaluoma's avatar
      neon fast quantize block pair · 61f0c090
      Tero Rintaluoma authored
      vp8_fast_quantize_b_pair_neon function added to quantize
      two adjacent blocks at the same time to improve performance.
       - Additional 3-6% speedup compared to neon optimized fast
         quantizer (Tanya VGA@30fps, 1Mbps stream, cpu-used=-5..-16)
      
      Change-Id: I3fcbf141e5d05e9118c38ca37310458afbabaa4e
      61f0c090
  6. 06 May, 2011 1 commit
    • Tero Rintaluoma's avatar
      neon fast quantizer updated · 33fa7c4e
      Tero Rintaluoma authored
      vp8_fast_quantize_b_neon function updated and further optimized.
       - match current C implementation of fast quantizer
       - updated to use asm_enc_offsets for structure members
       - updated ads2gas scripts to handle alignment issues
      
      Change-Id: I5cbad9c460ad8ddb35d2970a8684cc620711c56d
      33fa7c4e
  7. 01 Apr, 2011 1 commit
    • Tero Rintaluoma's avatar
      Wrapper function removed from vp8_subtract_b_neon function call · cec76a36
      Tero Rintaluoma authored
      Address calculations moved from encodemb_arm.c file to neon
      optimized assembly function to save cycles in function calls.
       - vp8_subtract_b_neon_func replaced with vp8_subtract_b_neon
         that contains all needed address calculations
       - unnecessary file encodemb_arm.c removed
       - consistent with ARMv6 optimized version
      
      Change-Id: I6cbc1a2670b56c2077f59995fcf8f70786b4990b
      cec76a36
  8. 28 Jan, 2011 1 commit
    • Tero Rintaluoma's avatar
      Adds "armvX-none-rvct" targets · 11a222f5
      Tero Rintaluoma authored
      Adds following targets to configure script to support RVCT compilation
      without operating system support (for Profiler or bare metal images).
       - armv5te-none-rvct
       - armv6-none-rvct
       - armv7-none-rvct
      
      To strip OS specific parts from the code "os_support"-config was added
      to script and CONFIG_OS_SUPPORT flag is used in the code to exclude OS
      specific parts such as OS specific includes and function calls for
      timers and threads etc. This was done to enable RVCT compilation for
      profiling purposes or running the image on bare metal target with
      Lauterbach.
      
      Removed separate AREA directives for READONLY data in armv6 and neon
      assembly files to fix the RVCT compilation. Otherwise
      "ldr <reg>, =label" syntax would have been needed to prevent linker
      errors. This syntax is not supported by older gnu assemblers.
      
      Change-Id: I14f4c68529e8c27397502fbc3010a54e505ddb43
      11a222f5
  9. 18 Jan, 2011 1 commit
    • Yunqing Wang's avatar
      Modify calling of NEON code in sub-pixel search · ce6c954d
      Yunqing Wang authored
      In vp8_find_best_sub_pixel_step_iteratively(), many times xoffset
      and yoffset are specific values - (4,0) (0,4) and (4,4). Modified
      code to call simplified NEON version at these specific offsets to
      help with the performance.
      
      Change-Id: Iaf896a0f7aae4697bd36a49e182525dd1ef1ab4d
      ce6c954d
  10. 27 Oct, 2010 1 commit
    • John Koleszar's avatar
      Add half-pixel variance RTCD functions · 209d82ad
      John Koleszar authored
      NEON has optimized 16x16 half-pixel variance functions, but they
      were not part of the RTCD framework. Add these functions to RTCD,
      so that other platforms can make use of this optimization in the
      future and special-case ARM code can be removed.
      
      A number of functions were taking two variance functions as
      parameters. These functions were changed to take a single
      parameter, a pointer to a struct containing all the variance
      functions for that block size. This provides additional flexibility
      for calling additional variance functions (the half-pixel special
      case, for example) and by initializing the table for all block sizes,
      we don't have to construct this function pointer table for each
      macroblock.
      
      Change-Id: I78289ff36b2715f9a7aa04d5f6fbe3d23acdc29c
      209d82ad
  11. 25 Oct, 2010 1 commit
    • Timothy B. Terriberry's avatar
      Add runtime CPU detection support for ARM. · b71962fd
      Timothy B. Terriberry authored
      The primary goal is to allow a binary to be built which supports
       NEON, but can fall back to non-NEON routines, since some Android
       devices do not have NEON, even if they are otherwise ARMv7 (e.g.,
       Tegra).
      The configure-generated flags HAVE_ARMV7, etc., are used to decide
       which versions of each function to build, and when
       CONFIG_RUNTIME_CPU_DETECT is enabled, the correct version is chosen
       at run time.
      In order for this to work, the CFLAGS must be set to something
       appropriate (e.g., without -mfpu=neon for ARMv7, and with
       appropriate -march and -mcpu for even earlier configurations), or
       the native C code will not be able to run.
      The ASFLAGS must remain set for the most advanced instruction set
       required at build time, since the ARM assembler will refuse to emit
       them otherwise.
      I have not attempted to make any changes to configure to do this
       automatically.
      Doing so will probably require the addition of new configure options.
      
      Many of the hooks for RTCD on ARM were already there, but a lot of
       the code had bit-rotted, and a good deal of the ARM-specific code
       is not integrated into the RTCD structs at all.
      I did not try to resolve the latter, merely to add the minimal amount
       of protection around them to allow RTCD to work.
      Those functions that were called based on an ifdef at the calling
       site were expanded to check the RTCD flags at that site, but they
       should be added to an RTCD struct somewhere in the future.
      The functions invoked with global function pointers still are, but
       these should be moved into an RTCD struct for thread safety (I
       believe every platform currently supported has atomic pointer
       stores, but this is not guaranteed).
      
      The encoder's boolhuff functions did not even have _c and armv7
       suffixes, and the correct version was resolved at link time.
      The token packing functions did have appropriate suffixes, but the
       version was selected with a define, with no associated RTCD struct.
      However, for both of these, the only armv7 instruction they actually
       used was rbit, and this was completely superfluous, so I reworked
       them to avoid it.
      The only non-ARMv4 instruction remaining in them is clz, which is
       ARMv5 (not even ARMv5TE is required).
      Considering that there are no ARM-specific configs which are not at
       least ARMv5TE, I did not try to detect these at runtime, and simply
       enable them for ARMv5 and above.
      
      Finally, the NEON register saving code was completely non-reentrant,
       since it saved the registers to a global, static variable.
      I moved the storage for this onto the stack.
      A single binary built with this code was tested on an ARM11 (ARMv6)
       and a Cortex A8 (ARMv7 w/NEON), for both the encoder and decoder,
       and produced identical output, while using the correct accelerated
       functions on each.
      I did not test on any earlier processors.
      
      Change-Id: I45cbd63a614f4554c3b325c45d46c0806f009eaa
      b71962fd
  12. 09 Sep, 2010 1 commit
  13. 18 Jun, 2010 1 commit
    • John Koleszar's avatar
      cosmetics: trim trailing whitespace · 94c52e4d
      John Koleszar authored
      When the license headers were updated, they accidentally contained
      trailing whitespace, so unfortunately we have to touch all the files
      again.
      
      Change-Id: I236c05fade06589e417179c0444cb39b09e4200d
      94c52e4d
  14. 04 Jun, 2010 1 commit
  15. 18 May, 2010 1 commit