- 10 Dec, 2015 1 commit
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Jian Zhou authored
Remove some redundant code. Change-Id: Ida2e8c0ce28770f7a9545ca014fe792b04295260
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- 08 Dec, 2015 1 commit
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Jian Zhou authored
4x4 Intra predictor implemented with MMX is replaced with SSE2. Segfault in change 315561 when decoding vp8 is taken care of. Change-Id: I083a7cb4eb8982954c20865160f91ebec777ec76
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- 05 Dec, 2015 1 commit
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James Zern authored
This reverts commit 89a1efa4. This causes a segfault when decoding vp8, in both 32 and 64-bit Change-Id: Idbb9bb28ab897e1d055340497c47b49a12231367
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- 04 Dec, 2015 4 commits
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Jian Zhou authored
Relocate the function from SSSE3 to SSE2, Unroll loop from 8 to 4, and reduce mem access to left. Speed up by >20% in ./test_intra_pred_speed. Change-Id: Ie48229c2e32404706b722442942c84983bda74cc
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Jian Zhou authored
Relocate the function from SSSE3 to SSE2, Unroll loop from 4 to 2, and reduce mem access to left. Speed up by >20% in ./test_intra_pred_speed. Change-Id: Ib9f1846819783b6e05e2a310c930eb844b2b4d2e
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Jian Zhou authored
8x8 Intra predictor implemented with MMX is replaced with SSE2. Change-Id: I0c90e7c1e1e6942489ac2bfe58903b728aac7a52
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Jian Zhou authored
4x4 Intra predictor implemented with MMX is replaced with SSE2. Change-Id: Id57da2a7c38832d0356bc998790fc1989d39eafc
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- 30 Nov, 2015 1 commit
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Jian Zhou authored
Relocate h_predictor_4x4 from SSSE3 to SSE2 with XMM registers. Speed up by ~25% in ./test_intra_pred_speed. Change-Id: I64e14c13b482a471449be3559bfb0da45cf88d9d
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- 25 Nov, 2015 1 commit
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Jian Zhou authored
Left neighbor read from memory only once. Speed up by ~20% in ./test_intra_pred_speed. Change-Id: Ia1388630df6fed0dce9a6eeded6cb855bbc43505
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- 19 Nov, 2015 1 commit
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Jian Zhou authored
tm_predictor_4x4 is implemented with SSE2 using XMM registers. Speed up by ~25% in ./test_intra_pred_speed. Change-Id: I25074b78d476a2cb17f81cf654bdfd80df2070e0
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- 07 Aug, 2015 1 commit
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Johann authored
Rename updated version of x86inc.asm Use "private_prefix" instead of "program_name" and make vpx the default prefix. Change-Id: I4883a99b2aee8e5dc9f2c16a2e6f4b5d6e4de458
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- 27 Jul, 2015 2 commits
- 07 May, 2015 1 commit
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hkuang authored
vp9_dc_left_predictor_16x16 vp9_dc_top_predictor_32x32 vp9_dc_left_predictor_32x32 vp9_dc_128_predictor_32x32 Change-Id: Ib9861deefd01c3527235b92ff6b3d571ef6b4bc6
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- 05 May, 2015 1 commit
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James Zern authored
widen the loads and stores to 128-bit. this was added, but not enabled in: 493a8579 Add some sse2 code for intra prediction. Change-Id: I277d7db608a7db7d75cc0bde86f48fa66ad487e4
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- 30 Apr, 2015 1 commit
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hkuang authored
Change-Id: I16c0a62e52dab62837c547345df31e7518620ed4
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- 18 Sep, 2013 1 commit
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Yunqing Wang authored
Current x86inc.asm didn't handle 32bit PIC build properly. TEXTRELs were seen in the library built. The PIC macros from libvpx's x86_abi_support.asm was used to fix this problem. The assembly code was modified to use the macros. Notes: We need this fix in for decoder building. Functions in encoder will be fixed later. Change-Id: Ifa548d37b1d0bc7d0528db75009cc18cd5eb1838
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- 10 Jul, 2013 3 commits
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Ronald S. Bultje authored
Change-Id: I3441c059214c2956e8261331bbf521525a617a86
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Ronald S. Bultje authored
Change-Id: I55a6cfa2daba738cbc0c4a02f806893f7e556997
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Ronald S. Bultje authored
Change-Id: Ibe1690afc5459f3b3beca401e7734fcd03da6dd0
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