1. 22 Dec, 2015 2 commits
    • James Zern's avatar
      configure: remove default CROSS for arm targets · 5aab99f2
      James Zern authored
      arm-none-linux-gnueabi- is an anachronism and makes building on native
      arm platforms more difficult. further, many distros include alternative
      cross compilers, e.g., arm-linux-gnueabihf-, so the choice is best left
      up to the user.
      
      Change-Id: Id8aaf820ed112b85db2b8518d0e9d8abee1ad85c
      5aab99f2
    • James Zern's avatar
      configure: avoid default when CROSS is set to null · 47a1718c
      James Zern authored
      avoids picking up defaults if CROSS is forcibly set empty as in:
      $ CROSS= ./configure ...
      
      BUG=1121
      
      Change-Id: I6af91959288dede01efe3e5945698ab249eb6ec3
      47a1718c
  2. 21 Dec, 2015 1 commit
  3. 19 Dec, 2015 2 commits
  4. 18 Dec, 2015 5 commits
    • Jian Zhou's avatar
      Code clean of highbd_v_predictor_4x4 · c91dd55e
      Jian Zhou authored
      MMX replaced with SSE2, same performance.
      
      Change-Id: I2ab8f30a71e5fadbbc172fb385093dec1e11a696
      c91dd55e
    • Marco Paniconi's avatar
    • Peter de Rivaz's avatar
      Fix for issue 1114 compile error · 7361ef73
      Peter de Rivaz authored
      In 32-bit build with --enable-shared, there is a lot of
      register pressure and register src_strideq is reused.
      The code needs to use the stack based version of src_stride,
      but this doesn't compile when used in an lea instruction.
      
      This patch also fixes a related segmentation fault caused by the
      implementation using src_strideq even though it has been
      reused.
      
      This patch also fixes the HBD subpel variance tests that fail
      when compiled without disable-optimizations.
      These failures were caused by local variables in the assembler
      routines colliding with the caller's stack frame.
      
      Change-Id: Ice9d4dafdcbdc6038ad5ee7c1c09a8f06deca362
      7361ef73
    • Jian Zhou's avatar
      Merge "Code clean of sad4xN(_avg)_sse" · 8f8a3b6a
      Jian Zhou authored
      8f8a3b6a
    • Marco's avatar
      Non-rd speed >=5: Include H/V intra for bsize=16x16. · c8a2c31e
      Marco authored
      H/V intra mode was only enabled for bsize < 16x16,
      enable it also for bsize=16x16.
      
      Metrics are neutral with this change:
      Overall very small gain (0.1%), small visual gain on some RTC clips.
      
      Change-Id: Ib2d7a44382433bfc11cf324aa3cc5c382ea9e088
      c8a2c31e
  5. 17 Dec, 2015 1 commit
    • Jian Zhou's avatar
      Code clean of sad4xN(_avg)_sse · b158d9a6
      Jian Zhou authored
      Replace MMX with SSE2, reduce psadbw ops which may help Silvermont.
      
      Change-Id: Ic7aec15245c9e5b2f3903dc7631f38e60be7c93d
      b158d9a6
  6. 16 Dec, 2015 7 commits
  7. 15 Dec, 2015 13 commits
  8. 14 Dec, 2015 6 commits
  9. 12 Dec, 2015 2 commits
  10. 11 Dec, 2015 1 commit