1. 03 Jan, 2018 1 commit
  2. 21 Dec, 2017 1 commit
    • Steinar Midtskogen's avatar
      Remove CDEF_SINGLEPASS defines · 8322ff04
      Steinar Midtskogen authored
      The experiment has been adopted and has been enabled by default for a
      while and the alternative code path has not been maintained for a long
      time, which is now removed.
      
      Change-Id: Iaf22f2969b45b71b2bf67707e131ab4c439b7fa6
      8322ff04
  3. 20 Dec, 2017 1 commit
    • Steinar Midtskogen's avatar
      Enable CDEF for chroma for 4:2:2 and 4:4:0 · ab6c9c77
      Steinar Midtskogen authored
      This enables CDEF for chroma when the horizontal and vertical
      subsampling differs.  Since the direction search is only performed in
      luma, the following corrections to the direction index are done for
      chroma to correct the distortion resulting from the subsampling:
      
      4:2:2:   4:4:0:
      0 -> 7   0 -> 1
      1 -> 0   1 -> 2
      2 -> 2   2 -> 2
      3 -> 4   3 -> 2
      4 -> 5   4 -> 3
      5 -> 6   5 -> 4
      6 -> 6   6 -> 6
      7 -> 6   7 -> 0
      
      This improves the chroma PSNR BDR by about 2% for 4:2:2 content at
      cpu-used=4, low delay configuration.  4:2:0 and 4:4:4 content is
      unchanged.
      
      Change-Id: Iee92d3697bc5a6fc9b1f340a63243a334935b433
      ab6c9c77
  4. 01 Dec, 2017 1 commit
    • Steinar Midtskogen's avatar
      Change CDEF block skip condition and move signalling · 6c24b029
      Steinar Midtskogen authored
      Previously CDEF was implicitly disabled for a filter block if all its
      sub-blocks were skip, and no bits for that block was signalled.  That
      required the CDEF signal to be transmitted at the end of the block,
      and it was not possible to begin the filtering of the block before
      that.
      
      This patch moves the signalling to just after the first zero skip bit
      within a 64x64, 128x64, 64x128 or 128x128 block.  If sub-blocks are
      skip, then no CDEF bits will be signalled, as before.  Also, the skip
      condition flag has been removed so it's always known at the skip flag
      whether a coding block is to be filtered or not.
      
      Change-Id: I3adfa3d2d01e288b7db876198aa9985ee9f53917
      6c24b029
  5. 01 Nov, 2017 2 commits
  6. 13 Oct, 2017 1 commit
  7. 12 Oct, 2017 1 commit
  8. 04 Sep, 2017 1 commit
  9. 11 Aug, 2017 1 commit
    • Steinar Midtskogen's avatar
      Add experiment CONFIG_CDEF_SINGLEPASS: Make CDEF single pass · 5978212b
      Steinar Midtskogen authored
      Low latency, cpu-used=0:
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.3162 | -0.6719 | -0.6535 |   0.0089 | -0.3890 | -0.1515 |    -0.6682
      
      High latency, cpu-used=0:
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.0293 | -0.3556 | -0.5505 |   0.0684 | -0.0862 |  0.0513 |    -0.2765
      
      Low latency, cpu-used=4:
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.2248 | -0.7764 | -0.6630 |  -0.2109 | -0.3240 | -0.2532 |    -0.6980
      
      High latency, cpu-used=4:
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.1118 | -0.5841 | -0.7406 |  -0.0463 | -0.2442 | -0.1064 |    -0.4187
      
      Change-Id: I9ca8399c8f45489541a66f535fb3d771eb1d59ab
      5978212b
  10. 04 Aug, 2017 1 commit
    • Steinar Midtskogen's avatar
      CDEF cleanup · 94de0aaa
      Steinar Midtskogen authored
      Name changes and code moves to bring code more in line with the
      design doc and an upcoming single-pass patch.  No functional changes.
      
      Change-Id: I2bccd58c644e534b139f420b623390aa971fbdb0
      94de0aaa
  11. 13 Jul, 2017 1 commit
  12. 19 Apr, 2017 2 commits
    • Steinar Midtskogen's avatar
      Retune CDEF dering threshold adjustment · fade4637
      Steinar Midtskogen authored
      Change the adjustment range from [50% ... 300%] to [25% ... 100%].
      Adjustments above 100% were very rare, and capping the adjustment at
      100% adds SIMD optimisation opportunities.  And lowering the other end
      to 25% seems to help compresson slightly.
      
      Low latency, used-cpu=0:
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.0453 | -0.1118 | -0.1127 |  -0.0689 | -0.0429 | -0.0814 |    -0.0762
      
      High latency, used-cpu=0:
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      -0.0303 |  0.0583 |  0.1740 |  -0.0440 | 0.0033 | -0.0042 |     0.0040
      
      Change-Id: Id999158330a53e8c3383cd0e53a91c7f59fe062a
      fade4637
    • Steinar Midtskogen's avatar
      Signal CDEF damping in the frame header · 0c966a50
      Steinar Midtskogen authored
      Change-Id: I57f232623e647f029b007de8ddb203c47ca3c11c
      0c966a50
  13. 14 Apr, 2017 1 commit
  14. 13 Apr, 2017 1 commit
    • Steinar Midtskogen's avatar
      CDEF: Optionally filter 8x8 skip blocks · 7b069a57
      Steinar Midtskogen authored
      Optionaly filter 8x8 skip blocks, but still leave superblocks that are
      completely skipped unchanged.  Use one bit in the dering level to
      signal replacing the signal for dering damping.
      
      This works better with cb4x4 that now is enabled by default.
      
      Low latency, used-cpu=4 change:
         PSNR|PSNR Cb|PSNR Cr|PSNR HVS|   SSIM|MS SSIM|CIEDE 2000
      -0.6260|-0.3263|-0.3797| -0.3574|-0.7072|-0.4828|   -0.6584
      
      Change-Id: I42c4290b52a50779770884fbabb020fdb1034ff7
      7b069a57
  15. 08 Apr, 2017 1 commit
  16. 07 Apr, 2017 1 commit
    • Steinar Midtskogen's avatar
      Restrict dering thresholds and add damping to RDO · daab348d
      Steinar Midtskogen authored
      High latency, cpu-used=0:
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.0947 |  0.0968 |  0.1203 |  -0.0325 | -0.0648 | -0.0290 |    -0.0099
      
      Low latency, cpu-used=0:
      PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.0635 |  0.1315 | -0.0771 |  -0.0122 | -0.0598 |  0.0111 |    -0.0362
      
      High latency, cpu-used=4:
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.1178 |  0.0026 |  0.1003 |  -0.0609 | -0.1287 | -0.1119 |    -0.1249
      
      Low latency, cpu-used=4:
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.0404 |  0.0547 |  0.0976 |   0.0042 | -0.0585 | -0.0234 |    -0.0245
      
      Change-Id: I48bcdb4d3d27512160ae1e1a36308dd62cf54c59
      daab348d
  17. 05 Apr, 2017 1 commit
    • Steinar Midtskogen's avatar
      CDEF: Add damping to dering · 8ff52fcc
      Steinar Midtskogen authored
      high-latency, cpu-used=0:
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.1650 |  0.2545 |  0.2977 |  -0.0423 | -0.0947 | -0.0725 |    -0.0365
      
      low-latency, cpu-used=0:
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.4006 |  0.0501 | -0.0108 |  -0.1790 | -0.1660 | -0.1992 |    -0.2135
      
      low latency, cpu-used=4:
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.5508 | -0.2445 | -0.2762 |  -0.1981 | -0.2878 | -0.2228 |    -0.3733
      
      Change-Id: Ia20df28c8bbb6182215b02016053af33bd498145
      8ff52fcc
  18. 04 Apr, 2017 2 commits
  19. 01 Apr, 2017 2 commits
  20. 29 Mar, 2017 3 commits
  21. 28 Mar, 2017 2 commits
  22. 25 Mar, 2017 1 commit
  23. 24 Mar, 2017 1 commit
  24. 21 Mar, 2017 2 commits
  25. 17 Mar, 2017 1 commit
    • Steinar Midtskogen's avatar
      Merge dering/clpf rdo and filtering · a9d41e88
      Steinar Midtskogen authored
      * Dering and clpf were merged into a single pass.
      * 32x32 and 128x128 filter block sizes for clpf were removed.
      * RDO for dering and clpf merged and improved:
        - "0" no longer required to be in the strength selection
        - Dering strength can now be 0, 1 or 2 bits per block
      
                    LL    HL
      PSNR:       -0.04 -0.01
      PSNR HVS:   -0.27 -0.18
      SSIM:       -0.15 +0.01
      CIEDE 2000: -0.11 -0.03
      APSNR:      -0.03 -0.00
      MS SSIM:    -0.18 -0.11
      
      Change-Id: I9f002a16ad218eab6007f90f1f176232443495f0
      a9d41e88
  26. 18 Feb, 2017 1 commit
  27. 17 Feb, 2017 2 commits
    • Thomas Daede's avatar
      Avoid unused variable warnings when CLPF and dering are enabled. · 15dbc1a1
      Thomas Daede authored
      Change-Id: I7909756e6a7d2da817b3354d6a8cb341cdc5bf98
      15dbc1a1
    • Jean-Marc Valin's avatar
      Disabling second dering filter when CLPF is enabled. · d9ad054e
      Jean-Marc Valin authored
      Low-latency:
      masterfix-ll-dering+clpf@2017-02-14T02:31:30.023Z -> masterfix-ll-dering-nosecond@2017-02-16T21:30:38.937Z
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.1151 | -0.2440 | -0.1287 |  -0.0454 | -0.1130 | -0.0632 |    -0.1206
      
      High-latency:
      masterfix-dering-clpf@2017-02-16T21:28:58.511Z -> dering-nosecond+clpf@2017-02-15T23:46:08.501Z
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.0340 | -0.0883 | -0.0130 |  -0.0104 | -0.0026 |  0.0245 |     0.0215
      
      Change-Id: I3e8f34b1971d3ec280c5695a6fcfb7d7b270b2d9
      d9ad054e
  28. 02 Nov, 2016 4 commits