1. 23 Jan, 2018 1 commit
  2. 18 Dec, 2017 1 commit
    • Urvang Joshi's avatar
      Re-enable TX64X64 by default. · efeafa85
      Urvang Joshi authored
      Incompatibilities with other experiments has been fixed.
      
      BUG=aomedia:1058
      
      Change-Id: Id8358404c8f452bccf05ce3c1d91a633b215f07d
      efeafa85
  3. 14 Dec, 2017 1 commit
  4. 06 Dec, 2017 1 commit
  5. 05 Dec, 2017 1 commit
    • Debargha Mukherjee's avatar
      Zero out half of 16x64 and 64x16 transforms · 60586676
      Debargha Mukherjee authored
      Constrain 16x64 transform so that the bottom 16x32 is zero;
      constrain 64x16 transform so that the right 32x16 is zero;
      Also implement 32x64 transform better to reduce intermediate
      coefficient range.
      
      Change-Id: Ia9050ee741ed1d5b02a42616635b496d637d932f
      60586676
  6. 02 Dec, 2017 1 commit
  7. 29 Nov, 2017 1 commit
  8. 22 Nov, 2017 1 commit
  9. 11 Nov, 2017 2 commits
    • Monty Montgomery's avatar
      Fix bitrot in LBD Daala inverse TX · df08def5
      Monty Montgomery authored
      Cleanup/optimizations of the low-bitdepth inverse TX path for AV1 TX
      broke Daala TX in several places; this patch cleans up the cleanup.
      
      Tested against the New Daala TX code that unified LBD/HBD, restores
      bit-identical TX behavior.
      
      monty-daalaTX-invzerotest-LBD-s1-2@2017-11-10T08:46:01.822Z ->
        monty-daalaTX-invzerotest-test-s1@2017-11-09T05:09:05.483Z
      
        PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      0.0000 |  0.0000 |  0.0000 |   0.0000 | 0.0000 |  0.0000 |     0.0000
      
      Change-Id: I58e4de4c71ec5251138ff7816f77777db6f869a3
      df08def5
    • Monty Montgomery's avatar
      Move all of LBD Daala TX to up-4, down-1 shift · 5500ce76
      Monty Montgomery authored
      Now that tran_low_t is assumed to be 32 bit when Daala TX is active,
      there's no reason for multi-stage shifting to fit coefficients into 16
      bits for the inter-tranform transpose matrix. Go to a consistent up by
      four, down by one shifting scheme for all TX block sizes.
      
      (Note this is for the current AV1 coefficient scaling scheme with
      av1_get_tx_scale and deeper coefficients for higher bitdepth input.
      Daala TX is moving to the long-intended constant-coefficient-depth in
      upcoming patches).
      
      subset 1:
      monty-4-1-baseline-s1@2017-11-11T05:57:15.857Z ->
       monty-4-1-test-s1@2017-11-11T05:57:52.983Z
      
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      -0.0117 | -0.0246 |  0.0530 |   0.0238 | 0.0254 |  0.0447 |    -0.0442
      
      Change-Id: I2214e94ac822542c504d472276723277ed350abf
      5500ce76
  10. 09 Nov, 2017 2 commits
    • Sebastien Alaiwan's avatar
      Remove LGT experiment · 2fa189e5
      Sebastien Alaiwan authored
      This experiment has been abandonned for AV1.
      
      Change-Id: If560a67d00b8ae3daa377a59293d5125a8cb7902
      2fa189e5
    • Monty Montgomery's avatar
      Add Daala TX to rectangular 32x64 and 64x32 transforms · 6a2a75b6
      Monty Montgomery authored
      This patch adds Daala TX transforms ot the 32x64 and 64x32 transform
      block sizes using Q3 (up 4, down 1) scaling.
      
      subset 1:
      monty-daalaTX-fulltest-Daalabaseline-s1@2017-11-07T00:01:46.582Z ->
       monty-daalaTX-LBD-Daala32x64-s1-Z@2017-11-07T06:10:58.523Z
      
        PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      0.0112 | -0.0769 |  0.0799 |   0.0567 | 0.0099 | -0.0077 |    -0.0446
      
      objective 1 fast:
      monty-daalaTX-fulltest-Daalabaseline-o1f4@2017-11-07T05:59:16.553Z ->
       monty-daalaTX-LBD-Daala32x64-o1f4-Z@2017-11-07T06:10:11.519Z
      
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.0190 |  0.0926 | -0.0730 |  -0.0516 | -0.0037 | -0.0588 |     0.1310
      
      Change-Id: I6246ecba388ae81deadc7b306dc3404fa7869aab
      6a2a75b6
  11. 07 Nov, 2017 1 commit
    • Monty Montgomery's avatar
      Fix build for CONFIG_DAALA_TX and CONFIG_TX64X64 · 683f70e7
      Monty Montgomery authored
      The recent 64x32 and 32x64 patches break the build when
      CONFIG_DAALA_TX and CONFIG_TX64X64 are enabled simultaneously.  This
      is a minor correction that fixes the build problem.
      
      Change-Id: I53cd8df9160fc35b67f2ac16bddcfab08425cf8e
      683f70e7
  12. 05 Nov, 2017 1 commit
  13. 02 Nov, 2017 1 commit
    • Sebastien Alaiwan's avatar
      Remove experimental flag of EXT_TX · 3bac9928
      Sebastien Alaiwan authored
      This experiment has been adopted, we can simplify the code
      by dropping the associated preprocessor conditionals.
      
      Change-Id: I02ed47186bbc32400ee9bfadda17659d859c0ef7
      3bac9928
  14. 24 Oct, 2017 1 commit
  15. 20 Oct, 2017 3 commits
  16. 19 Oct, 2017 1 commit
  17. 10 Oct, 2017 1 commit
    • Lester Lu's avatar
      lgt-from-pred: transforms based on prediction · 432012f6
      Lester Lu authored
      In this experiment, sharp image discontinuity in the predicted
      block is detected. Based on this discontinuity, we choose
      particular LGTs as row and column transforms.
      
      Bitstream syntax, entropy coding, and RD search for LGT are added.
      One binary symbol is used to signal whether LGT is used. This
      experiment can work independently with the lgt experiment.
      
      lowres: -0.414% for key frames, -0.151% overall
      midres: -0.413% for key frames, -0.161% overall
      
      Change-Id: Iaa2f2c2839c34ca4134fa55e77870dc3f1fa879f
      432012f6
  18. 05 Oct, 2017 1 commit
  19. 01 Oct, 2017 1 commit
  20. 28 Sep, 2017 1 commit
    • Monty Montgomery's avatar
      Remove dead av1_dct8x8_quant_xxxx functions · 7f7dd08a
      Monty Montgomery authored
      They're unused, disabled in the prototype setup, but still built and
      complicating the already convoluted ifdef mess in TX experiment
      configuration.
      
      Don't leave dead code in the sourcebase.  That's what SCM is for.
      
      Change-Id: Idb2adf597ac064c7b5027df8af1cf65054984aa4
      7f7dd08a
  21. 19 Sep, 2017 7 commits
  22. 18 Sep, 2017 8 commits
  23. 11 Sep, 2017 1 commit
    • Sarah Parker's avatar
      Tokenize and write mrc mask · 99e7daa2
      Sarah Parker authored
      This allows a mask for mrc-tx to be sent in the bitstream for
      inter or intra 32x32 transform blocks. The option to send the mask
      vs build it from the prediction signal is currently controlled with
      a macro. In the future, it is likely the macro will be removed and it
      will be possible for a block to select either method. The mask building
      functions are still placeholders and will be filled in in a followup.
      
      Change-Id: Ie27643ff172cc2b1a9b389fd503fe6bf7c9e21e3
      99e7daa2