- 05 Apr, 2017 14 commits
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Angie Chiang authored
Merge the calculation of intra mode into dist_block() Change-Id: I97ffc42ba0260355385fd636ca13ec6dd0949e9c
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Angie Chiang authored
This will allow us to merge the dist/sse calculation of inter/intra modes Change-Id: I3047d4bd0a068250544c5c9d2b47a580c7e243e6
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Yushin Cho authored
In the beginning of encoding and bitstream packing, the frame context in common of codec is copied to the frame context in each tile. Initial prob and context is based on flat probability and does not come from table at the moment. The bd-rate change for the test set objective-1-fast on awcy with high delay mode is: PSNR PSNR HVS SSIM CIEDE 2000 PSNR Cb PSNR Cr MS SSIM -0.77 -1.05 -0.74 -0.67 -0.67 -0.77 -0.88 Change-Id: Ic9105ac68aceb7486cb5f6f1c0b19df5853f2cb9
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Yushin Cho authored
In preparation for enabling backward updates of contexts for PVQ. 1. Default prob setting for PVQ, which is based on flat probabilities at the moment. 2. At the end of encoding a frame, average probablities and expected values of PVQ are copied to the frame context. Change-Id: I1d087b98e6b0d55ebf8aef696dd986f88197cedf
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Yushin Cho authored
Change-Id: I23b035340ed16b85a12856256d3115f19700dfb3
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Yushin Cho authored
Change-Id: I367d5561f53f60df42c3ff6f334b1441c85788bd
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Sarah Parker authored
When a global translation model is found, the only 3 bits of precision are used for the motion parameters. This case uses a smaller precision than the translation parameters in a global model that is rotzoom or greater. Change-Id: Ic972e9edf46e301f2894cce2b723960d0297c8e8
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Jingning Han authored
Change-Id: I4038d971455626c4c8e93b9b83e9155c5170349e
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Jingning Han authored
This commit integrates the level map coding within cb4x4 framework. Change-Id: Ied9721df0a7ffd21d1d69d68759d91b6c320c179
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Jingning Han authored
Change-Id: I215c4bed9ba5c7f4fc93533249610217de14ce54
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Yushin Cho authored
Change-Id: Idfe23c1aef5d080567094af6e87d65bda3835ae5
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Yushin Cho authored
Change-Id: I7b855a68c5fedda4e34bfcbbabafa9ba52c09735
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Yushin Cho authored
Change-Id: I2fd1d6f32b1b395dfdbe556b96dddf65f3cabbbe
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Yushin Cho authored
Change-Id: I4f7d37af84220971a839f4f8f42aafa1adeb04e4
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- 04 Apr, 2017 7 commits
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Angie Chiang authored
Change-Id: I35b2b69e3937e70a7923ba76735f035f366de27f
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Angie Chiang authored
Change-Id: I00554b925c0a870e766bc116c6d9cb02bd47a101
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Angie Chiang authored
Change-Id: I785a0fbef18adf7cbdbd4f09117d132c7fe69156
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Cheng Chen authored
Change-Id: I4b77388fa49e29a8302fe8c3276471e8156ce2d5
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Angie Chiang authored
This will make the code cleaner Change-Id: I94622b696b0a8d51d28dbbe29c767a62942bc5f3
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Jean-Marc Valin authored
high-latency, cpu=0: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 0.0817 | -0.4672 | -0.6651 | 0.1043 | 0.0968 | 0.1063 | -0.1847 low-latency, cpu=0: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 0.0860 | -0.7110 | -0.7393 | 0.1018 | 0.0946 | 0.1800 | -0.1537 low-latency, cpu=4: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 0.0097 | -0.8022 | -0.7514 | -0.0115 | 0.0621 | -0.0092 | -0.3804 Change-Id: I5c2eced295598771c7a74ec15a5f0eb84d872cc9
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Thomas Davies authored
Change-Id: Ifd55343b701eb753537b9711abd377adcedde8ec
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- 03 Apr, 2017 8 commits
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Angie Chiang authored
Move most of the code of inverse_transform_block to av1_inverse_transform_block such that encoder can use the function as well. Use av1_inverse_transform_block in av1_encoder_block_intra. This will make the code cleaner. Change-Id: I84dbeef2c65e252910606dbea446ce43165d504c
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Angie Chiang authored
This will simplify the code flow in av1_subtract_txb() Change-Id: I575da4a74f435b5862d2a848bdedae9856672121
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Angie Chiang authored
A simpler interface for intra block prediction Change-Id: I97e3f385746928d87999e6862b1d71a197df0302
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Angie Chiang authored
This function help us merge subtract block code in av1_subtract_plane and av1_encode_block_intra. Change-Id: Ie793d88a218f1082c6fe28900a521f461e34d564
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Alex Converse authored
It's less invasive and helps make future changes easier. Change-Id: I0f858462f14109ace4d76a31daeac4289c94bc6e
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Thomas Davies authored
EXT_TILE: allocate variables on the heap due to the potentially large number of tiles. ANS: initialise tile contexts. EXT_INTER, MOTION_VAR, WARPED_MOTION: fix compilation. Change-Id: I43a9d01c2442d97b6a8875712f77d932dce3740d
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Sarah Parker authored
Change-Id: Idae4934424b3e0c2de659e3f55ea6a47b5b4ceab
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Jean-Marc Valin authored
Previous code was using options selected for N=8 rather than the chosen number of options. low-latency, cpu=4: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 0.0077 | 0.0286 | -0.1166 | -0.0059 | -0.0479 | 0.0025 | -0.0101 Properly save the best strengths Change-Id: I629e929c2bc7a0a9592a9e49bfd7898d95174235
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- 31 Mar, 2017 5 commits
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Yi Luo authored
Change-Id: I99b15e5270bfefe2eb3e982aeba06ed564540d73
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James Zern authored
quiets -Wshorten-64-to-32 warnings ported from libvpx: 710483308 vp9: normalize vpx_enc_frame_flags_t usage Change-Id: Ice037acb675d1d81bfedf2dfcfa91a8a29a19dfd
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Debargha Mukherjee authored
Shear parameters for global motion are now computed once when the parameters are determined. Change-Id: Idfd53410079a81a81ddd4728f173a0d0ec60230b
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David Barker authored
When ext-inter and ref-mv are both enabled, this patch allows the NEAR_NEARMV and NEW_NEWMV modes to pick from the extended reference mv list, just like the NEARMV and NEWMV modes can. Change-Id: Ibcc9e19dba7779422c1c9589d5498159e83bf61e
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Alex Converse authored
Ported from VP9 with some heavy modifications bsize_dist@2017-03-29T23:18:27.564Z -> bcropped_dist@2017-03-29T23:21:00.200Z PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 -0.0966 | -0.0922 | 0.0032 | -0.0618 | -0.0579 | -0.0441 | -0.0959 Change-Id: Icdfcf47a9017fd3180e7fbc963196a43c5376c4e
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- 30 Mar, 2017 5 commits
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Yi Luo authored
BUG=aomedia:407 Change-Id: I27a7a230bbc701920a996d1e22ae4d22ca8cfead
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Debargha Mukherjee authored
Handles a rare divisin by 0 case. Also adds a check on global motion parameters to disable if the parameters obtained are outside the range that the shear supports. This fixes a rare assert failure. Also changes the recode loop threshold somewhat. Change-Id: I4c6e74b914ac653cd9caa0563d78b0a19a2a8627
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Alex Converse authored
SSE2 may be needed for nx4 and 4xn. Change-Id: I3c10112447fdb5fe51a68bc2c6e2f2641b102723
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Jean-Marc Valin authored
high-latency, cpu=0: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 0.0378 | 0.1946 | 0.1385 | -0.1159 | -0.2058 | -0.2085 | 0.1353 low-latency, cpu=0: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 0.2388 | 0.2234 | 0.3290 | 0.0623 | -0.1716 | -0.1704 | 0.2542 low-latency, cpu=4: PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000 0.4089 | 0.3477 | 0.6132 | 0.1729 | -0.1905 | -0.1610 | 0.5522 Change-Id: I35b8596667d82a127847b209416ad83e3b839a9a
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Yue Chen authored
Only blend with the first N neighbors at each side. If the size of one dimenstion is 8/16/32/64, the max # of neighbors to overlap with is 1/2/3/4. Previously we disable obmc mode if there are too many neighbors. Change of performance in AWCY, compared to disabling obmc if at any side there are more than 2 overlappable neighbors. HL improved by 0.02% LL improved by 0.09% Change-Id: I93d9a65c6c4aabf0b4a4946e2253d3e2ef21a662
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- 29 Mar, 2017 1 commit
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Steinar Midtskogen authored
Change-Id: Ibaaed850ddceba9c3db542eaf4a1c623ce6b412b
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