1. 13 Nov, 2017 2 commits
    • Cheng Chen's avatar
      JNT_COMP: SIMD for av1_warp_affine · fbaf5135
      Cheng Chen authored
      Add low bit-depth SIMD function for av1_warp_affine based on
      existing SIMD implementation.
      Unit tests are added.
      Change-Id: I1b4033fa75b53a81cb20a4bb5cc60413708b568c
    • Debargha Mukherjee's avatar
      Change tx_size encoding for intra modes · 6147b1b6
      Debargha Mukherjee authored
      Conveys depth from the largest transform size instead of the
      actual transform size. Besides, the max depth is now limited
      by the macro MAX_TX_DPETH set at 2.
      Results: BDRATE lowres (30 frames): -0.005%
      Change-Id: I1ccbac8ee18c77b816a6a8f500abfaa7892b21de
  2. 12 Nov, 2017 3 commits
    • Yaowu Xu's avatar
      Temporarily disable loopfiltering_across_tiles · db82c288
      Yaowu Xu authored
      This is to diagnose many nightly test failures.
      Change-Id: Ibf2da2cfe0fbb0e52920a007200335d672435c82
    • Debargha Mukherjee's avatar
      Fix some loop-restoration valgrind errors · 35bcd517
      Debargha Mukherjee authored
      Re-introduces a check that was removed in the refactor in 1a96c3f5.
      Change-Id: I548a30dba7586cf220b2f5a3f1fddf2b6b57e68d
    • Monty Montgomery's avatar
      Simplify Daala forward TX toplevel for constant shift · a2d40a39
      Monty Montgomery authored
      Rather than backing out all the LGT-related shifting matrices
      throughout the existing TX code, separate out and simplify Daala
      forward TX into a single dedicated entry point.  When DAALA_TX is
      enabled, CONFIG_HIGHBITDEPTH is also forced, and all of Daala TX
      (lowbd and highbd) uses this single TX dispatch.
      At present, this should result in no effective functional change,
      however rectangular transforms are now always column-first-- that
      has minor rounding effects.
      subset 1:
      monty-daalaTX-fulltest-DaalaRDO-s1@2017-11-07T00:02:56.282Z ->
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      -0.0576 |     N/A | -0.2646 |  -0.0125 | -0.0439 | -0.0479 |    -0.1798
      objective 1 fast:
      monty-daalaTX-fulltest-DaalaRDO-o1f4@2017-11-07T05:59:50.180Z ->
        PSNR | PSNR Cb | PSNR Cr | PSNR HVS |    SSIM | MS SSIM | CIEDE 2000
      0.0036 |  0.0477 |  0.1132 |   0.0863 | -0.0017 |  0.0209 |     0.0240
      Change-Id: I182a5c4388c410cbea8810e2f9e36fd37a4a46e5
  3. 11 Nov, 2017 6 commits
    • Frederic Barbier's avatar
      Remove experimental flag of CDEF · 1aeee2e9
      Frederic Barbier authored
      This experiment has been adopted, we can simplify the code
      by dropping the associated preprocessor conditionals.
      Change-Id: I17bd46ebad7796d04fb4065fb36da0e1c4eeaf9b
    • Monty Montgomery's avatar
      Add is_hbd field to TxfmParam · 26b8a99e
      Monty Montgomery authored
      In preparation for Daala unified LBD/HBD TX, add (and use) is_hbd
      field in TxfmPama structure.  This field indicates whether or not
      pixel data is using 8 or 16 bit reference buffers (currently ambiguous
      in the case of 8 bit input).
      Change-Id: I28bca792a48ffa00e208617adb072b08ff816e3c
    • Zoe Liu's avatar
      Add experiment of 'frame_refs' · 0492b99a
      Zoe Liu authored
      The target of this experiment is to fix and develop bitstream syntax
      changes related to reference frames, especially considering:
      (1) Fix various issues in aomedia bug 973;
      (2) Make according changes accomondating the adoption of frame_marker.
      Change-Id: Ia8731eaa3b3d2cdacbbe3c12b0793ac15928c054
    • Monty Montgomery's avatar
      Fix bitrot in LBD Daala inverse TX · df08def5
      Monty Montgomery authored
      Cleanup/optimizations of the low-bitdepth inverse TX path for AV1 TX
      broke Daala TX in several places; this patch cleans up the cleanup.
      Tested against the New Daala TX code that unified LBD/HBD, restores
      bit-identical TX behavior.
      monty-daalaTX-invzerotest-LBD-s1-2@2017-11-10T08:46:01.822Z ->
        PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      0.0000 |  0.0000 |  0.0000 |   0.0000 | 0.0000 |  0.0000 |     0.0000
      Change-Id: I58e4de4c71ec5251138ff7816f77777db6f869a3
    • Monty Montgomery's avatar
      Move all of LBD Daala TX to up-4, down-1 shift · 5500ce76
      Monty Montgomery authored
      Now that tran_low_t is assumed to be 32 bit when Daala TX is active,
      there's no reason for multi-stage shifting to fit coefficients into 16
      bits for the inter-tranform transpose matrix. Go to a consistent up by
      four, down by one shifting scheme for all TX block sizes.
      (Note this is for the current AV1 coefficient scaling scheme with
      av1_get_tx_scale and deeper coefficients for higher bitdepth input.
      Daala TX is moving to the long-intended constant-coefficient-depth in
      upcoming patches).
      subset 1:
      monty-4-1-baseline-s1@2017-11-11T05:57:15.857Z ->
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      -0.0117 | -0.0246 |  0.0530 |   0.0238 | 0.0254 |  0.0447 |    -0.0442
      Change-Id: I2214e94ac822542c504d472276723277ed350abf
    • David Michael Barr's avatar
      [CFL] basic early termination for alpha search · 9134586f
      David Michael Barr authored
      This causes no change in the encoder output.
      Comparing simple SSE-based RDO with the switch to
      txfm_rd_in_plane, the overhead is reduced by 23% ~ 50%.
      The total encode time increase is now 2.3% ~ 3.1%.
      Change-Id: I48c76216871f8ed68631815fd781697139305e94
  4. 10 Nov, 2017 27 commits
  5. 09 Nov, 2017 2 commits