1. 11 Nov, 2017 6 commits
    • Frederic Barbier's avatar
      Remove experimental flag of CDEF · 1aeee2e9
      Frederic Barbier authored
      This experiment has been adopted, we can simplify the code
      by dropping the associated preprocessor conditionals.
      
      Change-Id: I17bd46ebad7796d04fb4065fb36da0e1c4eeaf9b
      1aeee2e9
    • Monty Montgomery's avatar
      Add is_hbd field to TxfmParam · 26b8a99e
      Monty Montgomery authored
      In preparation for Daala unified LBD/HBD TX, add (and use) is_hbd
      field in TxfmPama structure.  This field indicates whether or not
      pixel data is using 8 or 16 bit reference buffers (currently ambiguous
      in the case of 8 bit input).
      
      Change-Id: I28bca792a48ffa00e208617adb072b08ff816e3c
      26b8a99e
    • Zoe Liu's avatar
      Add experiment of 'frame_refs' · 0492b99a
      Zoe Liu authored
      The target of this experiment is to fix and develop bitstream syntax
      changes related to reference frames, especially considering:
      (1) Fix various issues in aomedia bug 973;
      (2) Make according changes accomondating the adoption of frame_marker.
      
      BUG=aomedia:973
      
      Change-Id: Ia8731eaa3b3d2cdacbbe3c12b0793ac15928c054
      0492b99a
    • Monty Montgomery's avatar
      Fix bitrot in LBD Daala inverse TX · df08def5
      Monty Montgomery authored
      Cleanup/optimizations of the low-bitdepth inverse TX path for AV1 TX
      broke Daala TX in several places; this patch cleans up the cleanup.
      
      Tested against the New Daala TX code that unified LBD/HBD, restores
      bit-identical TX behavior.
      
      monty-daalaTX-invzerotest-LBD-s1-2@2017-11-10T08:46:01.822Z ->
        monty-daalaTX-invzerotest-test-s1@2017-11-09T05:09:05.483Z
      
        PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      0.0000 |  0.0000 |  0.0000 |   0.0000 | 0.0000 |  0.0000 |     0.0000
      
      Change-Id: I58e4de4c71ec5251138ff7816f77777db6f869a3
      df08def5
    • Monty Montgomery's avatar
      Move all of LBD Daala TX to up-4, down-1 shift · 5500ce76
      Monty Montgomery authored
      Now that tran_low_t is assumed to be 32 bit when Daala TX is active,
      there's no reason for multi-stage shifting to fit coefficients into 16
      bits for the inter-tranform transpose matrix. Go to a consistent up by
      four, down by one shifting scheme for all TX block sizes.
      
      (Note this is for the current AV1 coefficient scaling scheme with
      av1_get_tx_scale and deeper coefficients for higher bitdepth input.
      Daala TX is moving to the long-intended constant-coefficient-depth in
      upcoming patches).
      
      subset 1:
      monty-4-1-baseline-s1@2017-11-11T05:57:15.857Z ->
       monty-4-1-test-s1@2017-11-11T05:57:52.983Z
      
         PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
      -0.0117 | -0.0246 |  0.0530 |   0.0238 | 0.0254 |  0.0447 |    -0.0442
      
      Change-Id: I2214e94ac822542c504d472276723277ed350abf
      5500ce76
    • David Michael Barr's avatar
      [CFL] basic early termination for alpha search · 9134586f
      David Michael Barr authored
      This causes no change in the encoder output.
      Comparing simple SSE-based RDO with the switch to
      txfm_rd_in_plane, the overhead is reduced by 23% ~ 50%.
      The total encode time increase is now 2.3% ~ 3.1%.
      
      Change-Id: I48c76216871f8ed68631815fd781697139305e94
      9134586f
  2. 10 Nov, 2017 27 commits
  3. 09 Nov, 2017 7 commits