diff --git a/celt/x86/celt_lpc_sse.c b/celt/x86/celt_lpc_sse4_1.c
similarity index 100%
rename from celt/x86/celt_lpc_sse.c
rename to celt/x86/celt_lpc_sse4_1.c
diff --git a/celt_sources.mk b/celt_sources.mk
index f7d81cc4735115317004ba7b3e6637bbdddadeea..3e22c78d3293aca17f1f8ce07e400fa1847a58c1 100644
--- a/celt_sources.mk
+++ b/celt_sources.mk
@@ -27,7 +27,7 @@ celt/x86/pitch_sse2.c \
celt/x86/vq_sse2.c
CELT_SOURCES_SSE4_1 = \
-celt/x86/celt_lpc_sse.c \
+celt/x86/celt_lpc_sse4_1.c \
celt/x86/pitch_sse4_1.c
CELT_SOURCES_ARM = \
diff --git a/silk/fixed/x86/burg_modified_FIX_sse.c b/silk/fixed/x86/burg_modified_FIX_sse4_1.c
similarity index 100%
rename from silk/fixed/x86/burg_modified_FIX_sse.c
rename to silk/fixed/x86/burg_modified_FIX_sse4_1.c
diff --git a/silk/fixed/x86/vector_ops_FIX_sse.c b/silk/fixed/x86/vector_ops_FIX_sse4_1.c
similarity index 100%
rename from silk/fixed/x86/vector_ops_FIX_sse.c
rename to silk/fixed/x86/vector_ops_FIX_sse4_1.c
diff --git a/silk/x86/NSQ_del_dec_sse.c b/silk/x86/NSQ_del_dec_sse4_1.c
similarity index 100%
rename from silk/x86/NSQ_del_dec_sse.c
rename to silk/x86/NSQ_del_dec_sse4_1.c
diff --git a/silk/x86/NSQ_sse.c b/silk/x86/NSQ_sse4_1.c
similarity index 100%
rename from silk/x86/NSQ_sse.c
rename to silk/x86/NSQ_sse4_1.c
diff --git a/silk/x86/VAD_sse.c b/silk/x86/VAD_sse4_1.c
similarity index 100%
rename from silk/x86/VAD_sse.c
rename to silk/x86/VAD_sse4_1.c
diff --git a/silk/x86/VQ_WMat_EC_sse.c b/silk/x86/VQ_WMat_EC_sse4_1.c
similarity index 100%
rename from silk/x86/VQ_WMat_EC_sse.c
rename to silk/x86/VQ_WMat_EC_sse4_1.c
diff --git a/silk_sources.mk b/silk_sources.mk
index 6d143920a0c04ccfba0f25692eb464f6c39f3f71..67c8a4fdbfe2e4ce681462df756e8719870542fd 100644
--- a/silk_sources.mk
+++ b/silk_sources.mk
@@ -77,11 +77,11 @@ silk/stereo_find_predictor.c \
silk/stereo_quant_pred.c \
silk/LPC_fit.c
-SILK_SOURCES_SSE4_1 = silk/x86/NSQ_sse.c \
-silk/x86/NSQ_del_dec_sse.c \
+SILK_SOURCES_SSE4_1 = silk/x86/NSQ_sse4_1.c \
+silk/x86/NSQ_del_dec_sse4_1.c \
silk/x86/x86_silk_map.c \
-silk/x86/VAD_sse.c \
-silk/x86/VQ_WMat_EC_sse.c
+silk/x86/VAD_sse4_1.c \
+silk/x86/VQ_WMat_EC_sse4_1.c
SILK_SOURCES_ARM_NEON_INTR = \
silk/arm/arm_silk_map.c \
@@ -115,8 +115,8 @@ silk/fixed/vector_ops_FIX.c \
silk/fixed/schur64_FIX.c \
silk/fixed/schur_FIX.c
-SILK_SOURCES_FIXED_SSE4_1 = silk/fixed/x86/vector_ops_FIX_sse.c \
-silk/fixed/x86/burg_modified_FIX_sse.c
+SILK_SOURCES_FIXED_SSE4_1 = silk/fixed/x86/vector_ops_FIX_sse4_1.c \
+silk/fixed/x86/burg_modified_FIX_sse4_1.c
SILK_SOURCES_FIXED_ARM_NEON_INTR = \
silk/fixed/arm/warped_autocorrelation_FIX_neon_intr.c
diff --git a/win32/VS2015/opus.vcxproj b/win32/VS2015/opus.vcxproj
index 33bf706da1bd5982d26c1a940ad8b767f1b91a07..28da440a93389c734682f4f0141eddfd07adbe12 100644
--- a/win32/VS2015/opus.vcxproj
+++ b/win32/VS2015/opus.vcxproj
@@ -257,7 +257,7 @@
<ClCompile Include="..\..\celt\quant_bands.c" />
<ClCompile Include="..\..\celt\rate.c" />
<ClCompile Include="..\..\celt\vq.c" />
- <ClCompile Include="..\..\celt\x86\celt_lpc_sse.c" />
+ <ClCompile Include="..\..\celt\x86\celt_lpc_sse4_1.c" />
<ClCompile Include="..\..\celt\x86\pitch_sse.c" />
<ClCompile Include="..\..\celt\x86\pitch_sse2.c" />
<ClCompile Include="..\..\celt\x86\pitch_sse4_1.c" />
@@ -341,10 +341,10 @@
<ClCompile Include="..\..\silk\table_LSF_cos.c" />
<ClCompile Include="..\..\silk\VAD.c" />
<ClCompile Include="..\..\silk\VQ_WMat_EC.c" />
- <ClCompile Include="..\..\silk\x86\NSQ_del_dec_sse.c" />
- <ClCompile Include="..\..\silk\x86\NSQ_sse.c" />
- <ClCompile Include="..\..\silk\x86\VAD_sse.c" />
- <ClCompile Include="..\..\silk\x86\VQ_WMat_EC_sse.c" />
+ <ClCompile Include="..\..\silk\x86\NSQ_del_dec_sse4_1.c" />
+ <ClCompile Include="..\..\silk\x86\NSQ_sse4_1.c" />
+ <ClCompile Include="..\..\silk\x86\VAD_sse4_1.c" />
+ <ClCompile Include="..\..\silk\x86\VQ_WMat_EC_sse4_1.c" />
<ClCompile Include="..\..\silk\x86\x86_silk_map.c" />
<ClCompile Include="..\..\src\analysis.c" />
<ClCompile Include="..\..\src\mlp.c" />
@@ -391,4 +391,4 @@
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
<ImportGroup Label="ExtensionTargets">
</ImportGroup>
-</Project>
\ No newline at end of file
+</Project>
diff --git a/win32/VS2015/opus.vcxproj.filters b/win32/VS2015/opus.vcxproj.filters
index bb82b640ac59625dd45badd6ea07b95e4c37d64a..27d3533f2b3b16dfd2e17d0cbff7645b30764d01 100644
--- a/win32/VS2015/opus.vcxproj.filters
+++ b/win32/VS2015/opus.vcxproj.filters
@@ -230,7 +230,7 @@
<ClCompile Include="..\..\celt\celt_lpc.c">
<Filter>Source Files</Filter>
</ClCompile>
- <ClCompile Include="..\..\celt\x86\celt_lpc_sse.c">
+ <ClCompile Include="..\..\celt\x86\celt_lpc_sse4_1.c">
<Filter>Source Files</Filter>
</ClCompile>
<ClCompile Include="..\..\celt\cwrs.c">
@@ -449,10 +449,10 @@
<ClCompile Include="..\..\silk\NSQ_del_dec.c">
<Filter>Source Files</Filter>
</ClCompile>
- <ClCompile Include="..\..\silk\x86\NSQ_del_dec_sse.c">
+ <ClCompile Include="..\..\silk\x86\NSQ_del_dec_sse4_1.c">
<Filter>Source Files</Filter>
</ClCompile>
- <ClCompile Include="..\..\silk\x86\NSQ_sse.c">
+ <ClCompile Include="..\..\silk\x86\NSQ_sse4_1.c">
<Filter>Source Files</Filter>
</ClCompile>
<ClCompile Include="..\..\silk\pitch_est_tables.c">
@@ -548,13 +548,13 @@
<ClCompile Include="..\..\silk\VAD.c">
<Filter>Source Files</Filter>
</ClCompile>
- <ClCompile Include="..\..\silk\x86\VAD_sse.c">
+ <ClCompile Include="..\..\silk\x86\VAD_sse4_1.c">
<Filter>Source Files</Filter>
</ClCompile>
<ClCompile Include="..\..\silk\VQ_WMat_EC.c">
<Filter>Source Files</Filter>
</ClCompile>
- <ClCompile Include="..\..\silk\x86\VQ_WMat_EC_sse.c">
+ <ClCompile Include="..\..\silk\x86\VQ_WMat_EC_sse4_1.c">
<Filter>Source Files</Filter>
</ClCompile>
<ClCompile Include="..\..\silk\x86\x86_silk_map.c">
@@ -567,4 +567,4 @@
<Filter>Source Files</Filter>
</ClCompile>
</ItemGroup>
-</Project>
\ No newline at end of file
+</Project>