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Commit 40ef86f2 authored by Angie Chiang's avatar Angie Chiang
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Passing TXFM_TYPE instead of func pointer 

This is to facilitate sse2 implementation

Change-Id: Id2f53e83c5508c4445d9b1bba00a649cb4da6b74
parent 4914ae46
Hide whitespace changes
Inline Side-by-side
vp10/common/vp10_fwd_txfm2d.c
View file @ 40ef86f2
......@@ -9,8 +9,47 @@
*/
#include "vp10/common/vp10_txfm.h"
#include "vp10/common/vp10_fwd_txfm1d.h"
static INLINE void fwd_txfm2d_c(const int16_t *input, int32_t *output,
typedef void (*TxfmFunc)(const int32_t *input, int32_t *output,
const int8_t *cos_bit, const int8_t *stage_range);
static inline TxfmFunc fwd_txfm_type_to_func(TXFM_TYPE txfm_type) {
switch (txfm_type) {
case TXFM_TYPE_DCT4:
return vp10_fdct4_new;
break;
case TXFM_TYPE_DCT8:
return vp10_fdct8_new;
break;
case TXFM_TYPE_DCT16:
return vp10_fdct16_new;
break;
case TXFM_TYPE_DCT32:
return vp10_fdct32_new;
break;
case TXFM_TYPE_DCT64:
return vp10_fdct64_new;
break;
case TXFM_TYPE_ADST4:
return vp10_fadst4_new;
break;
case TXFM_TYPE_ADST8:
return vp10_fadst8_new;
break;
case TXFM_TYPE_ADST16:
return vp10_fadst16_new;
break;
case TXFM_TYPE_ADST32:
return vp10_fadst32_new;
break;
default:
assert(0);
return NULL;
}
}
static inline void fwd_txfm2d_c(const int16_t *input, int32_t *output,
const int stride, const TXFM_2D_CFG *cfg,
int32_t *txfm_buf) {
int i, j;
......@@ -20,8 +59,8 @@ static INLINE void fwd_txfm2d_c(const int16_t *input, int32_t *output,
const int8_t *stage_range_row = cfg->stage_range_row;
const int8_t *cos_bit_col = cfg->cos_bit_col;
const int8_t *cos_bit_row = cfg->cos_bit_row;
const TxfmFunc txfm_func_col = cfg->txfm_func_col;
const TxfmFunc txfm_func_row = cfg->txfm_func_row;
const TxfmFunc txfm_func_col = fwd_txfm_type_to_func(cfg->txfm_type_col);
const TxfmFunc txfm_func_row = fwd_txfm_type_to_func(cfg->txfm_type_row);
// txfm_buf's length is txfm_size * txfm_size + 2 * txfm_size
// it is used for intermediate data buffering
......
vp10/common/vp10_fwd_txfm2d_cfg.h
View file @ 40ef86f2
......@@ -27,8 +27,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_4 = {
fwd_stage_range_row_dct_dct_4, // .stage_range_row
fwd_cos_bit_col_dct_dct_4, // .cos_bit_col
fwd_cos_bit_row_dct_dct_4, // .cos_bit_row
vp10_fdct4_new, // .txfm_func_col
vp10_fdct4_new}; // .txfm_func_row;
TXFM_TYPE_DCT4, // .txfm_type_col
TXFM_TYPE_DCT4}; // .txfm_type_row
// ---------------- config fwd_dct_dct_8 ----------------
static const int8_t fwd_shift_dct_dct_8[3] = {5, -3, -1};
......@@ -46,8 +46,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_8 = {
fwd_stage_range_row_dct_dct_8, // .stage_range_row
fwd_cos_bit_col_dct_dct_8, // .cos_bit_col
fwd_cos_bit_row_dct_dct_8, // .cos_bit_row
vp10_fdct8_new, // .txfm_func_col
vp10_fdct8_new}; // .txfm_func_row;
TXFM_TYPE_DCT8, // .txfm_type_col
TXFM_TYPE_DCT8}; // .txfm_type_row
// ---------------- config fwd_dct_dct_16 ----------------
static const int8_t fwd_shift_dct_dct_16[3] = {4, -3, -1};
......@@ -69,8 +69,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_16 = {
fwd_stage_range_row_dct_dct_16, // .stage_range_row
fwd_cos_bit_col_dct_dct_16, // .cos_bit_col
fwd_cos_bit_row_dct_dct_16, // .cos_bit_row
vp10_fdct16_new, // .txfm_func_col
vp10_fdct16_new}; // .txfm_func_row;
TXFM_TYPE_DCT16, // .txfm_type_col
TXFM_TYPE_DCT16}; // .txfm_type_row
// ---------------- config fwd_dct_dct_32 ----------------
static const int8_t fwd_shift_dct_dct_32[3] = {3, -3, -1};
......@@ -92,19 +92,19 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_32 = {
fwd_stage_range_row_dct_dct_32, // .stage_range_row
fwd_cos_bit_col_dct_dct_32, // .cos_bit_col
fwd_cos_bit_row_dct_dct_32, // .cos_bit_row
vp10_fdct32_new, // .txfm_func_col
vp10_fdct32_new}; // .txfm_func_row;
TXFM_TYPE_DCT32, // .txfm_type_col
TXFM_TYPE_DCT32}; // .txfm_type_row
// ---------------- config fwd_dct_dct_64 ----------------
static int8_t fwd_shift_dct_dct_64[3] = {2, -2, -2};
static int8_t fwd_stage_range_col_dct_dct_64[12] = {13, 14, 15, 16, 17, 18,
19, 19, 19, 19, 19, 19};
static int8_t fwd_stage_range_row_dct_dct_64[12] = {17, 18, 19, 20, 21, 22,
22, 22, 22, 22, 22, 22};
static int8_t fwd_cos_bit_col_dct_dct_64[12] = {15, 15, 15, 15, 15, 14,
13, 13, 13, 13, 13, 13};
static int8_t fwd_cos_bit_row_dct_dct_64[12] = {15, 14, 13, 12, 11, 10,
10, 10, 10, 10, 10, 10};
static const int8_t fwd_shift_dct_dct_64[3] = {2, -2, -2};
static const int8_t fwd_stage_range_col_dct_dct_64[12] = {
13, 14, 15, 16, 17, 18, 19, 19, 19, 19, 19, 19};
static const int8_t fwd_stage_range_row_dct_dct_64[12] = {
17, 18, 19, 20, 21, 22, 22, 22, 22, 22, 22, 22};
static const int8_t fwd_cos_bit_col_dct_dct_64[12] = {15, 15, 15, 15, 15, 14,
13, 13, 13, 13, 13, 13};
static const int8_t fwd_cos_bit_row_dct_dct_64[12] = {15, 14, 13, 12, 11, 10,
10, 10, 10, 10, 10, 10};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_64 = {
64, // .txfm_size
......@@ -115,8 +115,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_64 = {
fwd_stage_range_row_dct_dct_64, // .stage_range_row
fwd_cos_bit_col_dct_dct_64, // .cos_bit_col
fwd_cos_bit_row_dct_dct_64, // .cos_bit_row
vp10_fdct64_new, // .txfm_func_col
vp10_fdct64_new}; // .txfm_func_row;
TXFM_TYPE_DCT64, // .txfm_type_col
TXFM_TYPE_DCT64}; // .txfm_type_row
// ---------------- config fwd_dct_adst_4 ----------------
static const int8_t fwd_shift_dct_adst_4[3] = {5, -2, -1};
......@@ -135,8 +135,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_4 = {
fwd_stage_range_row_dct_adst_4, // .stage_range_row
fwd_cos_bit_col_dct_adst_4, // .cos_bit_col
fwd_cos_bit_row_dct_adst_4, // .cos_bit_row
vp10_fdct4_new, // .txfm_func_col
vp10_fadst4_new}; // .txfm_func_row;
TXFM_TYPE_DCT4, // .txfm_type_col
TXFM_TYPE_ADST4}; // .txfm_type_row
// ---------------- config fwd_dct_adst_8 ----------------
static const int8_t fwd_shift_dct_adst_8[3] = {7, -3, -3};
......@@ -157,8 +157,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_8 = {
fwd_stage_range_row_dct_adst_8, // .stage_range_row
fwd_cos_bit_col_dct_adst_8, // .cos_bit_col
fwd_cos_bit_row_dct_adst_8, // .cos_bit_row
vp10_fdct8_new, // .txfm_func_col
vp10_fadst8_new}; // .txfm_func_row;
TXFM_TYPE_DCT8, // .txfm_type_col
TXFM_TYPE_ADST8}; // .txfm_type_row
// ---------------- config fwd_dct_adst_16 ----------------
static const int8_t fwd_shift_dct_adst_16[3] = {4, -1, -3};
......@@ -180,8 +180,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_16 = {
fwd_stage_range_row_dct_adst_16, // .stage_range_row
fwd_cos_bit_col_dct_adst_16, // .cos_bit_col
fwd_cos_bit_row_dct_adst_16, // .cos_bit_row
vp10_fdct16_new, // .txfm_func_col
vp10_fadst16_new}; // .txfm_func_row;
TXFM_TYPE_DCT16, // .txfm_type_col
TXFM_TYPE_ADST16}; // .txfm_type_row
// ---------------- config fwd_dct_adst_32 ----------------
static const int8_t fwd_shift_dct_adst_32[3] = {3, -1, -3};
......@@ -203,8 +203,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_32 = {
fwd_stage_range_row_dct_adst_32, // .stage_range_row
fwd_cos_bit_col_dct_adst_32, // .cos_bit_col
fwd_cos_bit_row_dct_adst_32, // .cos_bit_row
vp10_fdct32_new, // .txfm_func_col
vp10_fadst32_new}; // .txfm_func_row;
TXFM_TYPE_DCT32, // .txfm_type_col
TXFM_TYPE_ADST32}; // .txfm_type_row
// ---------------- config fwd_adst_adst_4 ----------------
static const int8_t fwd_shift_adst_adst_4[3] = {6, 1, -5};
......@@ -224,8 +224,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_4 = {
fwd_stage_range_row_adst_adst_4, // .stage_range_row
fwd_cos_bit_col_adst_adst_4, // .cos_bit_col
fwd_cos_bit_row_adst_adst_4, // .cos_bit_row
vp10_fadst4_new, // .txfm_func_col
vp10_fadst4_new}; // .txfm_func_row;
TXFM_TYPE_ADST4, // .txfm_type_col
TXFM_TYPE_ADST4}; // .txfm_type_row
// ---------------- config fwd_adst_adst_8 ----------------
static const int8_t fwd_shift_adst_adst_8[3] = {3, -1, -1};
......@@ -247,8 +247,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_8 = {
fwd_stage_range_row_adst_adst_8, // .stage_range_row
fwd_cos_bit_col_adst_adst_8, // .cos_bit_col
fwd_cos_bit_row_adst_adst_8, // .cos_bit_row
vp10_fadst8_new, // .txfm_func_col
vp10_fadst8_new}; // .txfm_func_row;
TXFM_TYPE_ADST8, // .txfm_type_col
TXFM_TYPE_ADST8}; // .txfm_type_row
// ---------------- config fwd_adst_adst_16 ----------------
static const int8_t fwd_shift_adst_adst_16[3] = {2, 0, -2};
......@@ -270,8 +270,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_16 = {
fwd_stage_range_row_adst_adst_16, // .stage_range_row
fwd_cos_bit_col_adst_adst_16, // .cos_bit_col
fwd_cos_bit_row_adst_adst_16, // .cos_bit_row
vp10_fadst16_new, // .txfm_func_col
vp10_fadst16_new}; // .txfm_func_row;
TXFM_TYPE_ADST16, // .txfm_type_col
TXFM_TYPE_ADST16}; // .txfm_type_row
// ---------------- config fwd_adst_adst_32 ----------------
static const int8_t fwd_shift_adst_adst_32[3] = {4, -2, -3};
......@@ -293,8 +293,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_32 = {
fwd_stage_range_row_adst_adst_32, // .stage_range_row
fwd_cos_bit_col_adst_adst_32, // .cos_bit_col
fwd_cos_bit_row_adst_adst_32, // .cos_bit_row
vp10_fadst32_new, // .txfm_func_col
vp10_fadst32_new}; // .txfm_func_row;
TXFM_TYPE_ADST32, // .txfm_type_col
TXFM_TYPE_ADST32}; // .txfm_type_row
// ---------------- config fwd_adst_dct_4 ----------------
static const int8_t fwd_shift_adst_dct_4[3] = {5, -4, 1};
......@@ -313,8 +313,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_4 = {
fwd_stage_range_row_adst_dct_4, // .stage_range_row
fwd_cos_bit_col_adst_dct_4, // .cos_bit_col
fwd_cos_bit_row_adst_dct_4, // .cos_bit_row
vp10_fadst4_new, // .txfm_func_col
vp10_fdct4_new}; // .txfm_func_row;
TXFM_TYPE_ADST4, // .txfm_type_col
TXFM_TYPE_DCT4}; // .txfm_type_row
// ---------------- config fwd_adst_dct_8 ----------------
static const int8_t fwd_shift_adst_dct_8[3] = {5, 1, -5};
......@@ -335,8 +335,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_8 = {
fwd_stage_range_row_adst_dct_8, // .stage_range_row
fwd_cos_bit_col_adst_dct_8, // .cos_bit_col
fwd_cos_bit_row_adst_dct_8, // .cos_bit_row
vp10_fadst8_new, // .txfm_func_col
vp10_fdct8_new}; // .txfm_func_row;
TXFM_TYPE_ADST8, // .txfm_type_col
TXFM_TYPE_DCT8}; // .txfm_type_row
// ---------------- config fwd_adst_dct_16 ----------------
static const int8_t fwd_shift_adst_dct_16[3] = {4, -3, -1};
......@@ -358,8 +358,8 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_16 = {
fwd_stage_range_row_adst_dct_16, // .stage_range_row
fwd_cos_bit_col_adst_dct_16, // .cos_bit_col
fwd_cos_bit_row_adst_dct_16, // .cos_bit_row
vp10_fadst16_new, // .txfm_func_col
vp10_fdct16_new}; // .txfm_func_row;
TXFM_TYPE_ADST16, // .txfm_type_col
TXFM_TYPE_DCT16}; // .txfm_type_row
// ---------------- config fwd_adst_dct_32 ----------------
static const int8_t fwd_shift_adst_dct_32[3] = {5, -4, -2};
......@@ -381,7 +381,7 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_32 = {
fwd_stage_range_row_adst_dct_32, // .stage_range_row
fwd_cos_bit_col_adst_dct_32, // .cos_bit_col
fwd_cos_bit_row_adst_dct_32, // .cos_bit_row
vp10_fadst32_new, // .txfm_func_col
vp10_fdct32_new}; // .txfm_func_row;
TXFM_TYPE_ADST32, // .txfm_type_col
TXFM_TYPE_DCT32}; // .txfm_type_row
#endif // VP10_FWD_TXFM2D_CFG_H_
vp10/common/vp10_inv_txfm2d.c
View file @ 40ef86f2
......@@ -9,8 +9,47 @@
*/
#include "vp10/common/vp10_txfm.h"
#include "vp10/common/vp10_inv_txfm1d.h"
static INLINE void inv_txfm2d_add_c(const int32_t *input, int16_t *output,
typedef void (*TxfmFunc)(const int32_t *input, int32_t *output,
const int8_t *cos_bit, const int8_t *stage_range);
static inline TxfmFunc inv_txfm_type_to_func(TXFM_TYPE txfm_type) {
switch (txfm_type) {
case TXFM_TYPE_DCT4:
return vp10_idct4_new;
break;
case TXFM_TYPE_DCT8:
return vp10_idct8_new;
break;
case TXFM_TYPE_DCT16:
return vp10_idct16_new;
break;
case TXFM_TYPE_DCT32:
return vp10_idct32_new;
break;
case TXFM_TYPE_DCT64:
return vp10_idct64_new;
break;
case TXFM_TYPE_ADST4:
return vp10_iadst4_new;
break;
case TXFM_TYPE_ADST8:
return vp10_iadst8_new;
break;
case TXFM_TYPE_ADST16:
return vp10_iadst16_new;
break;
case TXFM_TYPE_ADST32:
return vp10_iadst32_new;
break;
default:
assert(0);
return NULL;
}
}
static inline void inv_txfm2d_add_c(const int32_t *input, int16_t *output,
int stride, const TXFM_2D_CFG *cfg,
int32_t *txfm_buf) {
const int txfm_size = cfg->txfm_size;
......@@ -19,8 +58,8 @@ static INLINE void inv_txfm2d_add_c(const int32_t *input, int16_t *output,
const int8_t *stage_range_row = cfg->stage_range_row;
const int8_t *cos_bit_col = cfg->cos_bit_col;
const int8_t *cos_bit_row = cfg->cos_bit_row;
const TxfmFunc txfm_func_col = cfg->txfm_func_col;
const TxfmFunc txfm_func_row = cfg->txfm_func_row;
const TxfmFunc txfm_func_col = inv_txfm_type_to_func(cfg->txfm_type_col);
const TxfmFunc txfm_func_row = inv_txfm_type_to_func(cfg->txfm_type_row);
// txfm_buf's length is txfm_size * txfm_size + 2 * txfm_size
// it is used for intermediate data buffering
......
vp10/common/vp10_inv_txfm2d_cfg.h
View file @ 40ef86f2
......@@ -11,7 +11,6 @@
#ifndef VP10_INV_TXFM2D_CFG_H_
#define VP10_INV_TXFM2D_CFG_H_
#include "vp10/common/vp10_inv_txfm1d.h"
// ---------------- config inv_dct_dct_4 ----------------
static const int8_t inv_shift_dct_dct_4[2] = {1, -5};
static const int8_t inv_stage_range_col_dct_dct_4[4] = {17, 17, 16, 16};
......@@ -28,8 +27,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_4 = {
inv_stage_range_row_dct_dct_4, // .stage_range_row
inv_cos_bit_col_dct_dct_4, // .cos_bit_col
inv_cos_bit_row_dct_dct_4, // .cos_bit_row
vp10_idct4_new, // .txfm_func_col
vp10_idct4_new}; // .txfm_func_row;
TXFM_TYPE_DCT4, // .txfm_type_col
TXFM_TYPE_DCT4}; // .txfm_type_row
// ---------------- config inv_dct_dct_8 ----------------
static const int8_t inv_shift_dct_dct_8[2] = {0, -5};
......@@ -47,8 +46,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_8 = {
inv_stage_range_row_dct_dct_8, // .stage_range_row
inv_cos_bit_col_dct_dct_8, // .cos_bit_col
inv_cos_bit_row_dct_dct_8, // .cos_bit_row
vp10_idct8_new, // .txfm_func_col
vp10_idct8_new}; // .txfm_func_row;
TXFM_TYPE_DCT8, // .txfm_type_col
TXFM_TYPE_DCT8}; // .txfm_type_row
// ---------------- config inv_dct_dct_16 ----------------
static const int8_t inv_shift_dct_dct_16[2] = {0, -6};
......@@ -70,8 +69,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_16 = {
inv_stage_range_row_dct_dct_16, // .stage_range_row
inv_cos_bit_col_dct_dct_16, // .cos_bit_col
inv_cos_bit_row_dct_dct_16, // .cos_bit_row
vp10_idct16_new, // .txfm_func_col
vp10_idct16_new}; // .txfm_func_row;
TXFM_TYPE_DCT16, // .txfm_type_col
TXFM_TYPE_DCT16}; // .txfm_type_row
// ---------------- config inv_dct_dct_32 ----------------
static const int8_t inv_shift_dct_dct_32[2] = {-1, -6};
......@@ -93,19 +92,19 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_32 = {
inv_stage_range_row_dct_dct_32, // .stage_range_row
inv_cos_bit_col_dct_dct_32, // .cos_bit_col
inv_cos_bit_row_dct_dct_32, // .cos_bit_row
vp10_idct32_new, // .txfm_func_col
vp10_idct32_new}; // .txfm_func_row;
TXFM_TYPE_DCT32, // .txfm_type_col
TXFM_TYPE_DCT32}; // .txfm_type_row
// ---------------- config inv_dct_dct_64 ----------------
static int8_t inv_shift_dct_dct_64[2] = {-1, -7};
static int8_t inv_stage_range_col_dct_dct_64[12] = {19, 19, 19, 19, 19, 19,
19, 19, 19, 19, 18, 18};
static int8_t inv_stage_range_row_dct_dct_64[12] = {20, 20, 20, 20, 20, 20,
20, 20, 20, 20, 20, 20};
static int8_t inv_cos_bit_col_dct_dct_64[12] = {13, 13, 13, 13, 13, 13,
13, 13, 13, 13, 13, 14};
static int8_t inv_cos_bit_row_dct_dct_64[12] = {12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12};
static const int8_t inv_shift_dct_dct_64[2] = {-1, -7};
static const int8_t inv_stage_range_col_dct_dct_64[12] = {
19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 18, 18};
static const int8_t inv_stage_range_row_dct_dct_64[12] = {
20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20};
static const int8_t inv_cos_bit_col_dct_dct_64[12] = {13, 13, 13, 13, 13, 13,
13, 13, 13, 13, 13, 14};
static const int8_t inv_cos_bit_row_dct_dct_64[12] = {12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12};
static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_64 = {
64, // .txfm_size
......@@ -116,8 +115,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_64 = {
inv_stage_range_row_dct_dct_64, // .stage_range_row
inv_cos_bit_col_dct_dct_64, // .cos_bit_col
inv_cos_bit_row_dct_dct_64, // .cos_bit_row
vp10_idct64_new, // .txfm_func_col
vp10_idct64_new}; // .txfm_func_row;
TXFM_TYPE_DCT64, // .txfm_type_col
TXFM_TYPE_DCT64}; // .txfm_type_row
// ---------------- config inv_dct_adst_4 ----------------
static const int8_t inv_shift_dct_adst_4[2] = {1, -5};
......@@ -136,8 +135,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_4 = {
inv_stage_range_row_dct_adst_4, // .stage_range_row
inv_cos_bit_col_dct_adst_4, // .cos_bit_col
inv_cos_bit_row_dct_adst_4, // .cos_bit_row
vp10_idct4_new, // .txfm_func_col
vp10_iadst4_new}; // .txfm_func_row;
TXFM_TYPE_DCT4, // .txfm_type_col
TXFM_TYPE_ADST4}; // .txfm_type_row
// ---------------- config inv_dct_adst_8 ----------------
static const int8_t inv_shift_dct_adst_8[2] = {-1, -4};
......@@ -158,8 +157,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_8 = {
inv_stage_range_row_dct_adst_8, // .stage_range_row
inv_cos_bit_col_dct_adst_8, // .cos_bit_col
inv_cos_bit_row_dct_adst_8, // .cos_bit_row
vp10_idct8_new, // .txfm_func_col
vp10_iadst8_new}; // .txfm_func_row;
TXFM_TYPE_DCT8, // .txfm_type_col
TXFM_TYPE_ADST8}; // .txfm_type_row
// ---------------- config inv_dct_adst_16 ----------------
static const int8_t inv_shift_dct_adst_16[2] = {1, -7};
......@@ -181,8 +180,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_16 = {
inv_stage_range_row_dct_adst_16, // .stage_range_row
inv_cos_bit_col_dct_adst_16, // .cos_bit_col
inv_cos_bit_row_dct_adst_16, // .cos_bit_row
vp10_idct16_new, // .txfm_func_col
vp10_iadst16_new}; // .txfm_func_row;
TXFM_TYPE_DCT16, // .txfm_type_col
TXFM_TYPE_ADST16}; // .txfm_type_row
// ---------------- config inv_dct_adst_32 ----------------
static const int8_t inv_shift_dct_adst_32[2] = {-1, -6};
......@@ -204,8 +203,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_32 = {
inv_stage_range_row_dct_adst_32, // .stage_range_row
inv_cos_bit_col_dct_adst_32, // .cos_bit_col
inv_cos_bit_row_dct_adst_32, // .cos_bit_row
vp10_idct32_new, // .txfm_func_col
vp10_iadst32_new}; // .txfm_func_row;
TXFM_TYPE_DCT32, // .txfm_type_col
TXFM_TYPE_ADST32}; // .txfm_type_row
// ---------------- config inv_adst_adst_4 ----------------
static const int8_t inv_shift_adst_adst_4[2] = {0, -4};
......@@ -225,8 +224,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_4 = {
inv_stage_range_row_adst_adst_4, // .stage_range_row
inv_cos_bit_col_adst_adst_4, // .cos_bit_col
inv_cos_bit_row_adst_adst_4, // .cos_bit_row
vp10_iadst4_new, // .txfm_func_col
vp10_iadst4_new}; // .txfm_func_row;
TXFM_TYPE_ADST4, // .txfm_type_col
TXFM_TYPE_ADST4}; // .txfm_type_row
// ---------------- config inv_adst_adst_8 ----------------
static const int8_t inv_shift_adst_adst_8[2] = {-1, -4};
......@@ -248,8 +247,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_8 = {
inv_stage_range_row_adst_adst_8, // .stage_range_row
inv_cos_bit_col_adst_adst_8, // .cos_bit_col
inv_cos_bit_row_adst_adst_8, // .cos_bit_row
vp10_iadst8_new, // .txfm_func_col
vp10_iadst8_new}; // .txfm_func_row;
TXFM_TYPE_ADST8, // .txfm_type_col
TXFM_TYPE_ADST8}; // .txfm_type_row
// ---------------- config inv_adst_adst_16 ----------------
static const int8_t inv_shift_adst_adst_16[2] = {0, -6};
......@@ -271,8 +270,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_16 = {
inv_stage_range_row_adst_adst_16, // .stage_range_row
inv_cos_bit_col_adst_adst_16, // .cos_bit_col
inv_cos_bit_row_adst_adst_16, // .cos_bit_row
vp10_iadst16_new, // .txfm_func_col
vp10_iadst16_new}; // .txfm_func_row;
TXFM_TYPE_ADST16, // .txfm_type_col
TXFM_TYPE_ADST16}; // .txfm_type_row
// ---------------- config inv_adst_adst_32 ----------------
static const int8_t inv_shift_adst_adst_32[2] = {-1, -6};
......@@ -294,8 +293,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_32 = {
inv_stage_range_row_adst_adst_32, // .stage_range_row
inv_cos_bit_col_adst_adst_32, // .cos_bit_col
inv_cos_bit_row_adst_adst_32, // .cos_bit_row
vp10_iadst32_new, // .txfm_func_col
vp10_iadst32_new}; // .txfm_func_row;
TXFM_TYPE_ADST32, // .txfm_type_col
TXFM_TYPE_ADST32}; // .txfm_type_row
// ---------------- config inv_adst_dct_4 ----------------
static const int8_t inv_shift_adst_dct_4[2] = {1, -5};
......@@ -314,8 +313,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_4 = {
inv_stage_range_row_adst_dct_4, // .stage_range_row
inv_cos_bit_col_adst_dct_4, // .cos_bit_col
inv_cos_bit_row_adst_dct_4, // .cos_bit_row
vp10_iadst4_new, // .txfm_func_col
vp10_idct4_new}; // .txfm_func_row;
TXFM_TYPE_ADST4, // .txfm_type_col
TXFM_TYPE_DCT4}; // .txfm_type_row
// ---------------- config inv_adst_dct_8 ----------------
static const int8_t inv_shift_adst_dct_8[2] = {-1, -4};
......@@ -336,8 +335,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_8 = {
inv_stage_range_row_adst_dct_8, // .stage_range_row
inv_cos_bit_col_adst_dct_8, // .cos_bit_col
inv_cos_bit_row_adst_dct_8, // .cos_bit_row
vp10_iadst8_new, // .txfm_func_col
vp10_idct8_new}; // .txfm_func_row;
TXFM_TYPE_ADST8, // .txfm_type_col
TXFM_TYPE_DCT8}; // .txfm_type_row
// ---------------- config inv_adst_dct_16 ----------------
static const int8_t inv_shift_adst_dct_16[2] = {-1, -5};
......@@ -359,8 +358,8 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_16 = {
inv_stage_range_row_adst_dct_16, // .stage_range_row
inv_cos_bit_col_adst_dct_16, // .cos_bit_col
inv_cos_bit_row_adst_dct_16, // .cos_bit_row
vp10_iadst16_new, // .txfm_func_col
vp10_idct16_new}; // .txfm_func_row;
TXFM_TYPE_ADST16, // .txfm_type_col
TXFM_TYPE_DCT16}; // .txfm_type_row
// ---------------- config inv_adst_dct_32 ----------------
static const int8_t inv_shift_adst_dct_32[2] = {-1, -6};
......@@ -382,7 +381,7 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_32 = {
inv_stage_range_row_adst_dct_32, // .stage_range_row
inv_cos_bit_col_adst_dct_32, // .cos_bit_col
inv_cos_bit_row_adst_dct_32, // .cos_bit_row
vp10_iadst32_new, // .txfm_func_col
vp10_idct32_new}; // .txfm_func_row;
TXFM_TYPE_ADST32, // .txfm_type_col
TXFM_TYPE_DCT32}; // .txfm_type_row
#endif // VP10_INV_TXFM2D_CFG_H_
vp10/common/vp10_txfm.h
View file @ 40ef86f2
......@@ -150,6 +150,18 @@ static INLINE void clamp_block(int16_t *block, int block_size, int stride,
typedef void (*TxfmFunc)(const int32_t *input, int32_t *output,
const int8_t *cos_bit, const int8_t *stage_range);
typedef enum TXFM_TYPE {
TXFM_TYPE_DCT4,
TXFM_TYPE_DCT8,
TXFM_TYPE_DCT16,
TXFM_TYPE_DCT32,
TXFM_TYPE_DCT64,
TXFM_TYPE_ADST4,
TXFM_TYPE_ADST8,
TXFM_TYPE_ADST16,
TXFM_TYPE_ADST32,
} TXFM_TYPE;
typedef struct TXFM_2D_CFG {
const int txfm_size;
const int stage_num_col;
......@@ -160,8 +172,8 @@ typedef struct TXFM_2D_CFG {
const int8_t *stage_range_row;
const int8_t *cos_bit_col;
const int8_t *cos_bit_row;
const TxfmFunc txfm_func_col;
const TxfmFunc txfm_func_row;
const TXFM_TYPE txfm_type_col;
const TXFM_TYPE txfm_type_row;
} TXFM_2D_CFG;
#endif // VP10_TXFM_H_
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