these have been supported in tile-threaded decoding since:
b3b7645a vp9_dthread: remove frame_parallel_decoding_mode requirement

Change-Id: Ia5a752db9be937153cf4830d9258752136356d1b

Not used.

Change-Id: I71527d0ee43a5730f1a2527e7ab687a77a137db4

Small gain in metrics (average ~0.2dB), small
reduction in rate fluctuation.

Change-Id: Id75bd89c168486f075308fb474ebd26e3bdfb85b

Limit transform size for intra to 16x16, for non-screen content mode.
Little/no change in speed or metrics.
32x32 intra block is rarley selected in RTC (non-screen content) case,
but some visual improvement can be seen in some example,
e.g., captured_video_dark_whd.yuv.

Change-Id: I68e2db87875343b3fb9bb407a7709f0088f84072

Coding gain:
derflr 0.142%
hevclr 0.153%
hevcmr 0.124%

Change-Id: I63b56ae3a9002c3a266e10e2964135ed43b0ba53

Add a warning and assert that inputs for get_msb must not be zero.

Change-Id: I8c6f289ff13248f6e3a8bc24aab3712ed33022a6

remove static from fdct4/8/16/32 in vp10/encoder/dct.c
add prefix vp10_ to fdct4/8/16/32
add vp10/encoder/dct.h

Change-Id: I644827a191c1a7761850ec0b1da705638b618c66

Reference frame masking logic may skip checking zeromv-last mode.
Fix to avoid this and make sure zero-last is always checked.

No noticeable change in speed, and PSNR/SSIM metrics on RTC set overall
neutral (very small gain ~0.02).
Small visual improvement on few RTC clips.

Change-Id: I26eacdc449126424001a4a64e5ac31949f064417

the range check in dct.c (abs(input[i]) < (1 << bit)) will fail in many
cases. this was broken at the time this check was added

BUG=1076

Change-Id: I3df8c7a555e95567d73ac16acda997096ab8d6e2

Change-Id: Ib161e6fb3eb081f7176a1d969fed16a7d1ffc320

This was rewritten and moved to vpx_dsp/x86/vpx_subpixel_8t_ssse3.asm
in 19588302

Change-Id: I117ce983dae12006e302679ba7f175573dd9e874

the range check in dct.c (abs(input[i]) < (1 << bit)) will fail in the
25-29 range. this was broken at the time this check was added

Change-Id: I8ca9607f6cbdc8be7f47696ffeabbab3ac5727e2

Change-Id: I03b1e8f983f8cd87519aefda732210359b319c81

Shortcut arg for --extra-configure-args --enable-examples. Enables
the examples, and thus ensures that all versions of libvpx that
iosbuild.sh produces can actually be linked.

Change-Id: I2ddda094361bf0ac77f8d2ae542e4dc7b2cab158

* changes:
  vp9/decode_tiles_mt: move frame count accum from loop
  VP9Decoder: remove duplicate tile_worker_info
  vp9/decode_tiles_mt: move some inits from inner loop
  vp9_accumulate_frame_counts: pass counts directly

fixes build on windows x64; previously 'heightq' i.e., the 64-bit register
was accessed when only the 32-bit value was needed. given this is from a
stack variable the upper bits were undefined.

+ bump register/xmm counts; users of SETUP_LOCAL_VARS touch xmm13 in
64-bit builds and filter_block1d16_v* uses one extra temp variable

Change-Id: I9c768c0b2047481d1d3b11c2e16b2f8de6eb0d80

This commit removes mbmi_ext_base pointer from MACROBLOCK struct.
Its use case can be fully covered by cpi->mbmi_ext_base pointer.

Change-Id: I155351609336cf5b6145ed13c21b105052727f30

Add SVC codec control to set the frame flags and buffer indices
for each spatial layer of the current (super)frame to be encoded.
This allows the application to set (and change on the fly) the
reference frame configuration for spatial layers.

Added an example layer pattern (spatial and temporal layers)
in vp9_spatial_svc_encoder for the bypass_mode using new control.

Change-Id: I05f941897cae13fb9275b939d11f93941cb73bee

This means that we don't reconstruct in 4x4 dimensions, but in
blocksize dimensions, e.g. 4x8 or 8x4. This may in some cases lead
to performance improvements. Also, if we decide to re-introduce
scalable coding support, this would fix the fact that you need to
re-scale the MV halfway the block in sub8x8 non-4x4 blocks.

See issue 1013.

Change-Id: If39c890cad20dff96635720d8c75b910cafac495

In vp9, the bottom MV would be the average of the topright and
bottomleft luma MV (instead of the bottomleft/bottomright luma MV).

See issue 993.

Change-Id: Ic91c0b195950e7b32fc26c84c04788a09321e391

This has virtually no effect on coding efficiency, but it is more
logical from a theoretical perspective (since it makes no sense to
me that you would exclude a MV from a list just because it's sign-
inversed value is identical to a value already in a list), and it
also makes the code simpler (it removes a duplicate value check in
cases where signbias is equal between the two MVs being compared).

See issue 662.

Change-Id: I23e607c6de150b9f11d1372fb2868b813c322d37

See issue 1040 point 3.

Change-Id: If051b92c24a34d6a39861fb7d7180c5ca32f3d82

For reading, this makes the operation branchless, although it still
requires two shifts. For writing, this makes the operation as fast
as writing an unsigned value, branchlessly. This is also how other
codecs typically code signed, non-arithcoded bitstream elements.

See issue 1039.

Change-Id: I6a8182cc88a16842fb431688c38f6b52d7f24ead

The implicitly changed value would be used for contextualizing future
skip flags of neighbour blocks (bottom/right), which is certainly not
what was intended. The original code stems from vp8, and was useful
in cases where coding of the skip flag was disabled. In vp9, the skip
flag is always coded. The result of this change is that for bitstream
parsing purposes, decoding of the skip flag becomes independent of
decoding of block coefficients.

See issue 1014.

Change-Id: I8629e6abe76f7c1d649f28cd6fe22a675ce4a15d