Should no longer cause discontinuities in the noise after 5 packets

Viswanath Puttagunta authored 9 years ago and Jean-Marc Valin committed 9 years ago

Optimize opus decode (float only) use case using ARM NE10.
Mainly effects opus_ifft and ctl_mdct_backward and related
functions.

Work based on previous Encode optimization using ARM NE10
library. See previous commit for details on how to enable
this.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

Jonathan Lennox authored 9 years ago and Jean-Marc Valin committed 9 years ago

Enable x86 intrinsics when building in floating-point mode.
Support SSE as an arch value.
Use RTCD to conditionally enable existing floating-point Celt SSE code.
Call functions directly (without RTCD) when their architecture can be presumed.
Use SSE4.1 intrinsics optimized code for Silk even in floating-point mode.

xiangmingzhu authored 10 years ago and Jean-Marc Valin committed 10 years ago

1. Only for fixed point on x86 platform (32bit and 64bit, uses SIMD
   intrinsics up to SSE4.2)
2. Use "configure --enable-fixed-point --enable-intrinsics" to enable
   optimization, default is disabled.
3. Official test cases are verified and passed.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

Also minor C89 fix for the previous commit

We only keep when concealing less than 10ms with SILK.

Also adds denorm avoidance for non-48 kHz rates

Timothy B. Terriberry authored 11 years ago and Jean-Marc Valin committed 11 years ago

Optimizing celt_pitch_xcorr()/xcorr_kernel() which also speeds up
FIRs, IIRs and auto-correlations

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>

Newer versions of MSVC are unhappy with the strategy of the build
 environment redefining "inline" (even though they don't support the
 actual keyword). Instead we define OPUS_INLINE to the right thing
 in opus_defines.h.

This is the same approach we use for restrict.

Also get rid of the MSE measurement code which is outdated and no longer useful

Aurélien Zanelli authored 11 years ago and Timothy B. Terriberry committed 11 years ago

Run-time CPU detection (RTCD) is enabled by default if target platform support
it.
It can be disable at compile time with --disable-rtcd option.

Add RTCD support for ARM architecture.

Thanks to Timothy B. Terriberry for help and code review

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

A fixed shift factor was insufficient to properly estimate the decay
factor, resulting in extreme attenuation of the PLC excitation.

This makes all remaining large stack allocations use the vararray
 macros.
This continues the work of 6f2d9f50 to allow compiling with
 NONTHREADSAFE_PSEUDOSTACK to move the memory for large buffers
 off the stack for devices where it is very limited.

It also does this for some additional large buffers used by the
 PLC in the decoder.

Would cause the preemphasis and deemphasis to fail, but only with
custom modes enabled.

Should slightly improve coverage and reduce code size

This should reduce computation, reduce stack usage, and be
 substantially easier to read, but should not change behavior.
It's not quite bit-exact because I collapsed the application of the
 decay and the fading into a single pass to save one multiply per
 sample, but the difference signal is silent.

It also changes the comments into complete sentences.

Nils Wallménius authored 12 years ago and Jean-Marc Valin committed 12 years ago

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>

Previous code was so broken that it's`not worth listing the changes.
Aside from quality, one obvious improvement is a 3.75k reduction in stack size

We always define OPUS_BUILD, so this code has no effect.
Likewise there is no reason for it to be conditional.
According to Jean-Marc it's left over from when we had
an alternate CELT_BUILD define.

Nils Wallménius authored 12 years ago and Jean-Marc Valin committed 12 years ago

Remove two now redundant zeroing loops

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>