- Feb 15, 2024
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Jan Buethe authored
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Jan Buethe authored
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Jan Buethe authored
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Signed-off-by:
Jean-Marc Valin <jmvalin@jmvalin.ca>
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- Feb 14, 2024
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Jean-Marc Valin authored
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Jean-Marc Valin authored
Thanks to Igor Palaguta for reporting the issue. https://github.com/xiph/opus/issues/313
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Jan Buethe authored
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- Feb 11, 2024
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Jean-Marc Valin authored
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- Feb 10, 2024
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xcorr_kernel_neon_fixed() read one more sample from y[] in the main loop than it needed to allow use of vector loads, but unlike the native asm in celt_pitch_xcorr_arm.s, the loop condition did not exit early enough to prevent this from overrunning the end of the array. Additionally, the tail loop _always_ read one value beyond what it needed. This patch fixes the loop condition on the main loop. Since this makes the tail section run even for lengths that are a multiple of 8 (e.g., on fully half the multiplies for usages like celt_fir() or celt_iir() with an order of 16, which is common), rather than try to fix the tail loop, we replace it with a non-looping adaptation of the native asm, which continues to use vector loads as much as possible for the remaining elements (and also does not read ahead past the end of the y[] array). Overall slowdown of test_opus_encode on a Raspberry Pi 5 Model B Rev 1.0 is 0.12% vs. 0.13% for fixing the existing tail loop. Signed-off-by:
Jean-Marc Valin <jmvalin@jmvalin.ca>
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Compare the output of xcorr_kernel() against the results of xcorr_kernel_c() when configured with --enable-check-asm. Currently this is only checked in fixed point, as a float check requires more sophisticated error analysis and may need to be customized for each vector implementation. Signed-off-by:
Jean-Marc Valin <jmvalin@jmvalin.ca>
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- Feb 07, 2024
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Jean-Marc Valin authored
Still need more targeted tests, DRED decoding
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Jean-Marc Valin authored
Same for opus_multistream_packet_unpad()
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- Feb 06, 2024
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Jean-Marc Valin authored
Forgot to account for padding length bytes when DRED payload is large.
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Jean-Marc Valin authored
Fails ubsan because memcpy declares args as non-null
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- Feb 02, 2024
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Jean-Marc Valin authored
Matches the C version (see 4a7027b2)
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Jean-Marc Valin authored
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Jean-Marc Valin authored
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Found using `codespell -q 3 -L caf,highe,inlin,nd,ordert,shft` Signed-off-by:
Jean-Marc Valin <jmvalin@jmvalin.ca>
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- Feb 01, 2024
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Jean-Marc Valin authored
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- Jan 31, 2024
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Jean-Marc Valin authored
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Jean-Marc Valin authored
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Jean-Marc Valin authored
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Jean-Marc Valin authored
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Jean-Marc Valin authored
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Jean-Marc Valin authored
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- Jan 25, 2024
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Jean-Marc Valin authored
Rename, reindent, change arg order
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Need to move the redundant frame even in CBR because the hybrid frame now gets encoded as VBR, with DRED picking up the rest. Fixes an issue introduced in 4600e775.
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The encoder wouldn't reserve enough bits for CELT, causing it to not have enough bits to code the switching redundancy flag when it should have.
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Jean-Marc Valin authored
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Jean-Marc Valin authored
Adjust q0, qD and duration based on bitrate and loss.
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- Jan 23, 2024
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Jan Buethe authored
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- Jan 22, 2024
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Jan Buethe authored
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Jan Buethe authored
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Jan Buethe authored
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