Those intrinsics don't actually require alignment so we're OK

Jean-Marc Valin authored 1 year ago and Jean-Marc Valin committed 1 year ago

This only affects custom modes (builds with --enable-custom-modes) with frame
sizes 2.5, 5, 10, and 20ms and sampling rates below 40 kHz. The problem does
not affect normal use of Opus (using OpusEncoder/OpusDecoder) even when built
with custom modes enabled, but only special applications that use
OpusCustomEncoder/OpusCustomDecoder.

If configuring CELT for CBR but controlling the bitrate with
OPUS_SET_BITRATE rather than nbCompressedBytes, then the range
coder buffer would never get resized. AFAICT this could never
be triggered in Opus because CBR was also controlled by
nbCompressedBytes.

CELT encoding would just fail when setting CELT to CBR in hybrid mode.
It was never a problem because hybrid CBR was always used with
OPUS_BITRATE_MAX.

Makes it possible to run the pre-emphasis with the correct period/coeffs

Not used by anything yet

Zheng Lv authored 2 years ago and Felicia Lim committed 2 years ago

This makes kiss_twiddle_cpx 4-byte aligned (instead of 2-byte) for
fixed-point builds. Tested with an armv6j+nofp development board, CELT
encoding becomes 1.4x as fast, and decoding over 2x.

Performance gain is mostly attributed to the proper alignment of the
static const array mdct_twiddles960.

Co-authored-by: David Gao <davidgao@google.com>
Signed-off-by: Felicia Lim <flim@google.com>

Reviewed by Mark Harris

MULT16_32_QX() is now implemented using a signed-unsigned multiply,
so the second argument can now have one extra bit compared to the
old signed-signed implementation.

Reviewed by Mark Harris

We need to move the history out of the way before we write to the
shape array X, or else we get corruption of the audio.

Signed-off-by: Jean-Marc Valin <jmvalin@amazon.com>

Marcus Asteborg authored 2 years ago and Mark Harris committed 2 years ago

When building with FLOAT_APPROX.

Signed-off-by: Mark Harris <mark.hsj@gmail.com>

To avoid issues with empty compilation units.

Also #error if RTCD is enabled without a detection method, like Arm.
A number of SILK functions also still used the lookup tables, even
 when RTCD was disabled.
Fix those, too.

The values were never used, but ubsan + valgrind would complain.

Reviewed by Mark Harris

Reviewed by Mark Harris

Reviewed by Mark Harris

Timothy B. Terriberry authored 2 years ago and Jean-Marc Valin committed 2 years ago

The underlying objects are all 8-bit integers.
Verified that the generated assembly still just uses MOVD.

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>

Estimate the rounding error so that we can have a useful margin of
error when checking the asm against the C code even when the float
operations get reordered due to -ffast-math.

Makes ti possible to randomize (with --enable-fuzzing) the CPU flags
so we can better test all the intrinsics implementations.

Valgrind versions prior to 3.17.0 assume that an uninitialized value
 in ECX causes the whole output of CPUID to be uninitialized, even
 though ECX is only "read" by CPUID for certain values of EAX.
Work around that by guaranteeing that ECX is initialized.

This function can fail if CPUID is not supported or the maximum
 supported value of EAX is less than the requested one.
Check the return value and explicitly disable all SIMD if it does
 fail.
This was happening before implicitly because of the initialization
 of info[] to zero, but being explicit about it makes it less likely
 someone will break this behavior because they did not realize what
 was going on.

Make sure we don't try to use the rtcd table when rtcd is disabled.
That code still needs a lot more cleaning up.

Reviewed by Timothy B. Terriberry.

We now update the background noise estimate even in frames classified
as transient. It shouldn't be a problem because we're using min
statistics. Also, it avoids problems when update frames get
missclassified as transient.

In addition, we now use the duration of losses rather than the
number of lost packets to make decisions. That should make
PLC/DTX behaviour more consistent across frame sizes.