Victor Ding authored 1 year ago and Jean-Marc Valin committed 1 year ago

The optimization is bit-exact with C function.

This optimization speeds up SILK encoder (floating point) as following:

AMD Zen:
Complexity 0-5 :      0%
Complexity 6-7 : 3 -  7%
Complexity 8-10: 8 - 15%

Intel Skylake:
Complexity 0-5 :       0%
Complexity 6-7 : 14 - 18%
Complexity 8-10: 17 - 22%

Adapted by Jean-Marc Valin

Also #error if RTCD is enabled without a detection method, like Arm.
A number of SILK functions also still used the lookup tables, even
 when RTCD was disabled.
Fix those, too.

The indentation for nested #ifs was all over the place.

Linfeng Zhang authored 8 years ago and Jean-Marc Valin committed 7 years ago

Change-Id: I607a8b75b0711a485384d6f854cf6e2ec18b38b7

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>

Koen Vos authored 9 years ago and Jean-Marc Valin committed 8 years ago

The NSQ SSE optimizations are disabled for now because they need to be updated

Jonathan Lennox authored 9 years ago and Timothy B. Terriberry committed 8 years ago

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

Jonathan Lennox authored 9 years ago and Jean-Marc Valin committed 9 years ago

Enable x86 intrinsics when building in floating-point mode.
Support SSE as an arch value.
Use RTCD to conditionally enable existing floating-point Celt SSE code.
Call functions directly (without RTCD) when their architecture can be presumed.
Use SSE4.1 intrinsics optimized code for Silk even in floating-point mode.

xiangmingzhu authored 10 years ago and Jean-Marc Valin committed 10 years ago

1. Only for fixed point on x86 platform (32bit and 64bit, uses SIMD
   intrinsics up to SSE4.2)
2. Use "configure --enable-fixed-point --enable-intrinsics" to enable
   optimization, default is disabled.
3. Official test cases are verified and passed.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>