To avoid issues with empty compilation units.

Marcus Asteborg authored 6 years ago and Jean-Marc Valin committed 5 years ago

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>

Make these consistent with the other optimization file
sets which use a suffix to indicate the extension they
use.

Signed-off-by: Jonathan Lennox <jonathan@vidyo.com>

Distinguish source files for the SSE 4.1 instruction
set extension consistently by their filename. This makes
it easier to check the correct flags are being set at
build time.

Signed-off-by: Jonathan Lennox <jonathan@vidyo.com>

Uniform layout is easier for external tools to parse,
especially maintaining one source file per line.

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>

Linfeng Zhang authored 8 years ago and Jean-Marc Valin committed 7 years ago

This optimization is bit exact with C functions.

Change-Id: Ia9ce6dd3c20d2f56dbd43ddc02d1a6fd6554608d

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>

We used the SSE reciprocal square root instruction to vectorize the serch rather
than compare one at a time with multiplies. Speeds up the entire encoder by 8-10%.

Viswanath Puttagunta authored 9 years ago and Jean-Marc Valin committed 9 years ago

Optimize opus encode (float only) usecase using ARM NE10
library. Mainly effects opus_fft and ctl_mdct_forward
and related functions.

This optimization can be used for ARM CPUs that have NEON
VFP unit. This patch only enables optimizations for ARMv7.

Official ARM NE10 library page available at
http://projectne10.github.io/Ne10/



To enable this optimization, use
--enable-intrinsics --with-NE10=<install_prefix>
or
--enable-intrinsics --with-NE10-libraries=<NE10_lib_dir> --with-NE10-includes=<NE10_includes_dir>

Compile time checks made during configure process to make sure
optimization option available only when compiler supports NEON
instrinsics.

Runtime checks made to make sure optimized functions only called
on appropriate hardware.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

Jonathan Lennox authored 9 years ago and Jean-Marc Valin committed 9 years ago

Move SSE2 and SSE4.1 intrinsics functions to separate files, to be compiled with appropriate compiler flags. Otherwise, compilers are allowed to take advantage of (e.g.) -msse4.1 to generate code that uses SSE4.1 instructions, even when no SSE4.1 intrinsics are explicitly used in the source.

Viswanath Puttagunta authored 10 years ago and Timothy B. Terriberry committed 10 years ago

Optimize celt_pitch_xcorr function (for floating point)
using ARM NEON intrinsics for SoCs that have NEON VFP unit.

To enable this optimization, use --enable-intrinsics
configure option.

Compile time and runtime checks are also supported to make sure
this optimization is only enabled when the compiler supports
NEON intrinsics.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

xiangmingzhu authored 10 years ago and Jean-Marc Valin committed 10 years ago

1. Only for fixed point on x86 platform (32bit and 64bit, uses SIMD
   intrinsics up to SSE4.2)
2. Use "configure --enable-fixed-point --enable-intrinsics" to enable
   optimization, default is disabled.
3. Official test cases are verified and passed.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

Timothy B. Terriberry authored 11 years ago and Jean-Marc Valin committed 11 years ago

Optimizing celt_pitch_xcorr()/xcorr_kernel() which also speeds up
FIRs, IIRs and auto-correlations

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>

Aurélien Zanelli authored 11 years ago and Timothy B. Terriberry committed 11 years ago

Run-time CPU detection (RTCD) is enabled by default if target platform support
it.
It can be disable at compile time with --disable-rtcd option.

Add RTCD support for ARM architecture.

Thanks to Timothy B. Terriberry for help and code review

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

Timothy B. Terriberry authored 14 years ago and Jean-Marc Valin committed 14 years ago

The byte buffer is now part of the range coder struct itself, and
 rangeenc.c and rangedec.c have gone away.