Again, this only impacts the PLC and we assume the order is a multiple of 4.

Only impacts the PLC. We now assume that the order is a multiple of 4.

Rename y0 and y1 because of the name clash with Bessel functions.
Initialize y_3 to zero because gcc is too dumb to realize it can't
be used uninitialized.

Computes most of the auto-correlation by reusing pitch_xcorr(). We only
need lag*(lag-1)/2 MACs to complete the calculations.
To do this, pitch_xcorr() was modified so that it no longer truncates the
length to a multiple of 4. Also, the xcorr didn't need the floor at -1.
As a side benefit, this speeds up the PLC, which uses a higher order LPC
filter.

Also creates a new hardcoded 5th order fir.

If there's no complete author tag, we need to add an opening
quote character manually. See the EBU entry.

The normative reference is now the channel configurations
give directly in the draft.

Previous markup was invalid.

I've done some editing for clarity, but more needs to be done.
The language needs clean-up, we should forward-reference the LPC
Extrapolation section, and we need a reference for actually
computing linear prediction coefficients.

More recent versions of draft-sheffer-running-code suggest referring
to a wiki. We'd like to try maintaining the implementation status
separately.

About 30% faster on x86.

Introduced in c152d602.

Thanks to Pedro Becerra for the report.

Introduced in c152d602.

Thanks to Pedro Becerra for the report.

Thanks to John Ridges for the report.

Define ARMv4_ASM to 1 like the other ARM defines.

Remove a redundant include and some dead stores.

Patch by Aurélien Zanelli <aurelien.zanelli@parrot.com>.

Measures a 0.1% speedup on 96 kbps stereo encode+decode on a
 Cortex A8.

Nils Wallménius authored 11 years ago and Timothy B. Terriberry committed 11 years ago

Reorder register usage to take advantage of early termination on
 multiplications and reorder a load instruction to hide its
 latency on ARM9.
Speeds up decoding of a 64 kbps test file by 0.1MHz on an ARM7TDMI
 and 0.2MHz on an ARM9TDMI.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

Nils Wallménius authored 11 years ago and Timothy B. Terriberry committed 11 years ago

Uses a C implementation with a 32*32 => 64 multiplication, which
 ARM has.
Speeds up decoding of a 64 kbps test file by 0.5MHz on an ARM7TDMI
 and 1.0MHz on an ARM9TDMI.
0.2% speedup on a 96 kbps enc+dec test on a Cortex A8.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>

This splits out the non-arch-specific portions of a patch written
 by Aurélien Zanelli <aurelien.zanelli@parrot.com
 http://lists.xiph.org/pipermail/opus/2013-May/002088.html

I also added support for odd n, for custom modes.

0.25% speedup on 96 kbps stereo encode+decode on a Cortex A8.

Missed the armv5e extension on a couple of functions.

58.4% speedup (2.4x faster) on test_unit_cwrs32 (no custom modes).
Gives a 3.2% speedup on
 ./opus_demo restricted-lowdelay 48000 2 96000 comp48-stereo.sw /dev/null
 on a 600 MHz Cortex A8.

Otherwise make dist does not include these files in the source
 tarball.

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0068b/CIHBJEHG.html
 says that "Rd cannot be the same as Rm."
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0068b/CIHBJEHG.html
 says that "RdLo, RdHi, and Rm must all be different registers."
This means that some of the early clobbers I removed really should
 have been there (to prevent aliasing Rd, RdLo, or RdHi with Rm).
It also means that we should reverse some of the operands in the
 FFT's complex multiplies.
This should only affect the ARMv4 optimizations.

Thanks to Nils Wallménius for the report.

While we're here, audit the commutative pair flags again, since I
 screwed up at least one of them, and eliminate some dead code.

Needed by commit 972a34ec.

Use autoreconf in autogen.sh instead of the handwritten version,
it's simpler, and also updates things that we weren't handling.

Drop the hand-written INSTALL file.  Its information content was
~zero, and autotools wants to overwrite it with its own version,
so don't fight that, just .gitignore it.

In most cases these will use __builtin_clz().
In a follow-up, we should audit usage of silk_CLZ32() and convert
 the places where its argument must be non-zero to use EC_ILOG()
 directly to avoid the test for zero (which is necessary on x86).

Since the last patch originally had them mangled (presumably by
 mailer, http server, or something else), let's just get rid of
 them.