The decoder does not use this function.

Change-Id: Ie67f909c0f4108ef286789c70df867d4b960a780

Prior to this patch, read_inter_block_mode_info() would
find the nearmv and nearestmv for all modes.  Now it does not
search for ZEROMV modes and breaks out early for NEARMV and
NEWMV modes.

Change-Id: Ifa7b1eaf58bb03b9c7792ea5012fef477527d0fd

Also includes a bug fix.

Change-Id: Ia49ed00f8ffd1531c10bcf89b1f497310ee7cb82

The nominal tx_type for a given mode is used as a context
to encode the actual tx_type for intra.

Results:
derflr: -0.241% BDRATE
hevcmr: -0.366% BDRATE

Change-Id: Icfe7b0a58d79bc6497a06e3441779afec6e01e21

This commit enables encoder to avoid 8x4 and 4x8 partitions for
scaled reference frames when libvpx is configured and built with
--enable-better-hw-compatibility

Change-Id: I02ad65c386f5855f4325d72570c49164ed52f413

Change-Id: I12de2dd5e5f375551804166188d76a9ad8067b41

Move the logic for forcing zero_mode after the
(ref_frame & flag_list) check.
This was causing an memory leak under msan:
https://bugs.chromium.org/p/webrtc/issues/detail?id=5402

Change-Id: Ie9d243369f8ed7c332f46178275945331da4fd85

Under --enable-better-hw-compabibility, this commit adds the asserts
that no mv clamping is applied for scaled references, so when built
with this configure option, decoder will assert if an input bitstream
triggger mv clamping for scaled reference frames.

Change-Id: I786e86a2bbbfb5bc2d2b706a31b0ffa8fe2eb0cb

This commit adds a new configure option:

--enable-better-hw-compatibility

The purpose of the configure option is to provide information on known
hardware decoder implementation bugs, so encoder implementers may
choose to implement their encoders in a way to avoid triggering these
decoder bugs.

The WebM team were made aware of that a number of hardware decoders
have trouble in handling the combination of scaled frame reference
frame and 8x4 or 4x8 partitions. This commit added asserts to vp9
decoder, so when built with above configure option, the decoder can
assert if an input bitstream triggers such decoder bug.

Change-Id: I386204cfa80ed16b50ebde57f886121ed76200bf

Add function to compute skin map for a given block, as its
used in several places (cyclic refresh, noise estimation, and denoising).

Change-Id: Ied622908df43b6927f7fafc6c019d1867f2a24eb

Set initial values for these parameters in the vp9_init_layer_context().

This also fixes an issue in the svc-bypass mode when frame flags are
passed via the vpx_codec_encode().

Change-Id: I0968f04672f8d3d2fe2cea6b8a23f79f80d7a8b1

Otherwise, per-segment lossless might mean that some segments are not
lossless and they could still want to use another mode. The per-block
tx points remain uncoded on blocks where (per the segment id) the Q
value implies lossless.

Change-Id: If210206ab1fe3dd11976797370c77f961f13dfa0

Change-Id: Ic23c10b6d2a9fed3abe69c6bf10e910832444f2c

Change-Id: I83703851f65f93573ebf7d2c0d0f056ba879c07a

* changes:
  Code clean of highbd_tm_predictor_16x16
  Code clean of highbd_dc_predictor_32x32

Remove the ARCH_X86_64 constraint. No performance hit on both
big core and small core.

Change-Id: I39860b62b7a0ae4acaafdca7d68f3e5820133a81

Remove the ARCH_X86_64 constraint.

Change-Id: I0139f8e998cc5525df55161c2054008d21ac24d4

Remove the ARCH_X86_64 constraint.

Change-Id: I7d2545fc4f24eb352cf3e03082fc4d48d46fbb09

For coding block sizes <=16X16, if the block is determined to be skin,
then always allow for that block to be candidate for refresh. So if that
block happens to be on the boost segment(s), segment won't get reset to 0
and delta-q will be applied.

PSNR/SSIM metrics neutral (little/no change) on RTC clips.
Speed increase small/negligible (< 1%).
Some visual improvement on faces in a few RTC clips.

Change-Id: I6bf0fce6f39d820b491ce05d7c017ad168fce7d6

reduce the register count by 1 to avoid xmm6 and unnecessarily
penalizing the other users of the base macro

Change-Id: I59605c9a41a31c1b74f67ec06a40d1a7f92c4699

Replace MMX with SSE2, reduce mem access to left neighbor,
loop unrolled.

Change-Id: I941be915af809025f121ecc6c6443f73c9903e70

MMX replaced with SSE2, same performance.

Change-Id: I2ab8f30a71e5fadbbc172fb385093dec1e11a696

MMX replaced with SSE2, same performance.

Change-Id: Ic57855254e26757191933c948fac6aa047fadafc