- Jul 08, 2016
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Notably, ARM floating-point build. This maintains the invariant that we don't use later instruction sets if the OS claims an earlier one is not available. However, it does not update configure to ensure that there is build support for all earlier instruction sets if NEON build support is enabled (though I am not aware of a build toolchain where this is actually a problem). Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Jean-Marc Valin authored
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Jean-Marc Valin authored
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Mark Harris authored
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Ralph Giles authored
Add a matrix build testing the most common options. I don't see a way to also invoke Makefile.unix without wrapping everything in a script, so leave that to jenkins for now.
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Ralph Giles authored
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- Jul 07, 2016
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Jean-Marc Valin authored
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Jean-Marc Valin authored
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Jean-Marc Valin authored
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Jean-Marc Valin authored
len<0 still returns OPUS_BAD_ARG
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Jean-Marc Valin authored
Rather than read invalid memory
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- Jul 06, 2016
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Timothy B. Terriberry authored
There are no tabs in source code.
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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This makes it match the formatting of the output for ARM assembly better, and removes some redundant repetition of the word "intrinsics". It also fixes the output if a compiler supports RTCD for Neon intrinsics but not assembly. Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Used for celt_pitch_xcorr on aarch64, and celt_fir and celt_iir on both armv7 and aarch64. Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Enables existing Neon intrinsic optimizations to work on aarch64 targets. Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by:
Timothy B. Terriberry <tterribe@xiph.org>
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Mark Harris authored
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Ralph Giles authored
Thanks to RiCON for reporting this.
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Ralph Giles authored
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Ralph Giles authored
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- Jul 05, 2016
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Jean-Marc Valin authored
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Jean-Marc Valin authored
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- Jul 04, 2016
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Jean-Marc Valin authored
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Ralph Giles authored
Coverity warns about the possibly-overlappying memcpy in this block, presumedly because it can't prove predictLPCOrder <= MAX_LPC_ORDER here. Add an assert to make the intent clear in code as well as in the comment.
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Jean-Marc Valin authored
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