Need to move the redundant frame even in CBR because the hybrid
frame now gets encoded as VBR, with DRED picking up the rest.
Fixes an issue introduced in 4600e775.

The encoder wouldn't reserve enough bits for CELT, causing it
to not have enough bits to code the switching redundancy flag
when it should have.

Avoids valgrind complaining about use of uninitialized memory

Removes float debug weights, as well as useless spaces

Use OPUS_DRED instead of NEURAL_FEC

Also default to disabling dnn float debugging

Still don't quite know what I'm doing

Compilers sometimes replace vmlaq*() with fmul+fadd instead of fmla.
Trying to use vfmaq*() instead when possible.

Finished adversarial training on 800k model. Also, move weights to a new
location.

1) Enable asm/intrinsics even for floating-point
2) Make sure ARMv8 asimd enables EDSP/MEDIA/Neon
3) Add dotp architecture to rtcd table since AArch *can* have dotp

Adds RTCD tables for compute_activation() and compute_conv2d()

Avoids having to write intrinsics for simple loops

Enabling only on platforms that have been tested just in case we
run into a non-IEEE754 platform where they would break.

Still missing some intrinsics

Used for DNN matrix multiplies

Code moved to compute_frame_features()

for cmake, force PRESEUME_SSE4_1 on PRESUME_AVX2

aka banging on it until it builds on my machine.
Further improvements welcome

Not yet with rtcd