luzpaz authored 1 year ago and Jean-Marc Valin committed 1 year ago

Found using `codespell -q 3 -L caf,highe,inlin,nd,ordert,shft`

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>

Rename, reindent, change arg order

Jean-Marc Valin authored 1 year ago and Jean-Marc Valin committed 1 year ago

Need to move the redundant frame even in CBR because the hybrid
frame now gets encoded as VBR, with DRED picking up the rest.
Fixes an issue introduced in 4600e775.

Jean-Marc Valin authored 1 year ago and Jean-Marc Valin committed 1 year ago

The encoder wouldn't reserve enough bits for CELT, causing it
to not have enough bits to code the switching redundancy flag
when it should have.

Adjust q0, qD and duration based on bitrate and loss.

Avoids valgrind complaining about use of uninitialized memory

Still don't quite know what I'm doing

DRED will absorb the bitrate variation

Starting with compute_linear()

Removing some indirections

Controls whether deep PLC is enabled

No dependency on the data files if no DNN code enabled

Signed-off-by: Jean-Marc Valin <jmvalin@amazon.com>

Signed-off-by: Jean-Marc Valin <jmvalin@amazon.com>

When ready, change DRED_EXTENSION_ID to the final ID, remove
DRED_EXPERIMENTAL_VERSION completely, and change DRED_EXPERIMENTAL_BYTES
to zero (eventually remove it).